Datasheet

PRODUCTPREVIEW
MSP432P401R, MSP432P401M
www.ti.com SLAS826 –MARCH 2015
Table 5-13. LPM3, LPM4 Mode Transition Latencies
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
LATENCY
ORIGINAL FINAL OPERATING
PARAMETER TEST CONDITIONS UNIT
OPERATING MODE MODE
TYP MAX
SELM = 3,
DCO frequency = TBD TBD
Transition from
16 MHz
AM_LDO_VCORE0 to
t
AMLDO0_LPMx0
(1)
AM_LDO_VCORE0 LPM3_LPM4_VCORE0 µs
LPM3 or LPM4 at
SELM = 3,
VCORE0.
DCO frequency = 22 24
24 MHz
SELM = 3,
Transition from LPM3 or
DCO frequency = TBD TBD
LPM4 at VCORE0 to
16 MHz
AM_LDO_VCORE0
t
LPMx0_AMLDO0_NORIO
(2)
LPM3_LPM4_VCORE0 AM_LDO_VCORE0 µs
through wake-up event
SELM = 3,
from nonglitch filter type
DCO frequency = 10 15
I/O.
24 MHz
SELM = 3,
Transition from LPM3 or
DCO frequency = TBD TBD
LPM4 at VCORE0 to
16 MHz
AM_LDO_VCORE0
t
LPMx0_AMLDO0_GFLTIO
(2)
LPM3_LPM4_VCORE0 AM_LDO_VCORE0 µs
through wake-up event
SELM = 3,
from glitch filter type I/O,
DCO frequency = 10 16
GLTFLT_EN = 1
24 MHz
Transition from
SELM = 3,
AM_LDO_VCORE1 to
t
AMLDO1_LPMx1
(1)
AM_LDO_VCORE1 LPM3_LPM4_VCORE1 DCO frequency = TBD TBD µs
LPM3 or LPM4 at
32 MHz
VCORE1.
Transition from
SELM = 3,
AM_LDO_VCORE1 to
t
AMLDO1_LPMx1
(1)
AM_LDO_VCORE1 LPM3_LPM4_VCORE1 DCO frequency = 21 23 µs
LPM3 or LPM4 at
48 MHz
VCORE1
Transition from LPM3 or
LPM4 at VCORE1 to
SELM = 3,
AM_LDO_VCORE1
t
LPMx1_AMLDO1_NORIO
(2)
LPM3_LPM4_VCORE1 AM_LDO_VCORE1 DCO frequency = TBD TBD µs
through wake-up event
32 MHz
from nonglitch filter type
I/O.
Transition from LPM3 or
LPM4 at VCORE1 to
SELM = 3,
AM_LDO_VCORE1
t
LPMx1_AMLDO1_NORIO
(2)
LPM3_LPM4_VCORE1 AM_LDO_VCORE1 DCO frequency = 10 15 µs
through wake-up event
48 MHz
from nonglitch filter type
I/O.
Transition from LPM3 or
LPM4 at VCORE1 to
SELM = 3,
AM_LDO_VCORE1
t
LPMx1_AMLDO1_GFLTIO
(2)
LPM3_LPM4_VCORE1 AM_LDO_VCORE1 DCO frequency = TBD TBD µs
through wake-up event
32 MHz
from glitch filter type I/O,
GLTFLT_EN = 1.
Transition from LPM3 or
LPM4 at VCORE1 to
SELM = 3,
AM_LDO_VCORE1
t
LPMx1_AMLDO1_GFLTIO
(2)
LPM3_LPM4_VCORE1 AM_LDO_VCORE1 DCO frequency = 10 16 µs
through wake-up event
48 MHz
from glitch filter type I/O,
GLTFLT_EN = 1
(1) This is the latency from WFI instruction execution by CPU to LPM3 or LPM4 entry.
(2) This is the latency from I/O wake-up event to MCLK clock start at device pin.
Copyright © 2015, Texas Instruments Incorporated Specifications 25
Submit Documentation Feedback
Product Folder Links: MSP432P401R MSP432P401M