Datasheet

PRODUCTPREVIEW
MSP432P401R, MSP432P401M
www.ti.com SLAS826 –MARCH 2015
5.10 Timing and Switching Characteristics
5.10.1 Mode Transition Timing
Table 5-11. Active Mode Transition Latencies
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
LATENCY
ORIGINAL FINAL OPERATING
PARAMETER TEST CONDITIONS UNIT
OPERATING MODE MODE
TYP MAX
From V
CC
reaching 1.65 V to start of
t
OFF_AMLDO0,100 nF
Power Off AM_LDO_VCORE0 4.5 5.2 ms
application code. C
VCORE
= 100 nF.
From V
CC
reaching 1.65 V to start of
t
OFF_AMLDO0,4.7 µF
Power Off AM_LDO_VCORE0 4.7 5.8 ms
application code. C
VCORE
= 4.7 µF.
Transition from AM_LDO_VCORE0
t
AMLDO0_AMLDO1
AM_LDO_VCORE0 AM_LDO_VCORE1 to AM_LDO_VCORE1. MCLK 285 340 µs
frequency = 24 MHz.
Transition from AM_LDO_VCORE1
t
AMLDO1_AMLDO0
AM_LDO_VCORE1 AM_LDO_VCORE0 to AM_LDO_VCORE0. MCLK 4 5 µs
frequency = 24 MHz.
Transition from AM_LDO_VCORE0
t
AMLDO0_AMDCDC0
AM_LDO_VCORE0 AM_DCDC_VCORE0 to AM_DCDC_VCORE0. MCLK 15 32 µs
frequency = 24 MHz
Transition from
AM_DCDC_VCORE0 to
t
AMDCDC0_AMLDO0
AM_DCDC_VCORE0 AM_LDO_VCORE0 15 27 µs
AM_LDO_VCORE0. MCLK
frequency = 24 MHz
Transition from AM_LDO_VCORE1
t
AMLDO1_AMDCDC1
AM_LDO_VCORE1 AM_DCDC_VCORE1 to AM_DCDC_VCORE1. MCLK 15 32 µs
frequency = 48 MHz
Transition from
AM_DCDC_VCORE1 to
t
AMDCDC1_AMLDO1
AM_DCDC_VCORE1 AM_LDO_VCORE1 15 27 µs
AM_LDO_VCORE1. MCLK
frequency = 48 MHz
Transition from AM_LDO_VCORE0
to AM_LF_VCORE0. All high
t
AMLDO0_AMLF0
AM_LDO_VCORE0 AM_LF_VCORE0 frequency clock sources (DCO, 115 125 µs
HFXT, MODOSC) disabled. SELM =
2, REFO frequency = 128 kHz
Transition from AM_LF_VCORE0 to
AM_LDO_VCORE0. All high
t
AMLF0_AMLDO0
AM_LF_VCORE0 AM_LDO_VCORE0 frequency clock sources (DCO, 115 130 µs
HFXT, MODOSC) disabled. SELM =
2, REFO frequency = 128 kHz.
Transition from AM_LDO_VCORE1
to AM_LF_VCORE1. All high
t
AMLDO1_AMLF1
AM_LDO_VCORE1 AM_LF_VCORE1 frequency clock sources (DCO, 110 115 µs
HFXT, MODOSC) disabled. SELM =
2, REFO frequency = 128 kHz.
Transition from AM_LF_VCORE1 to
AM_LDO_VCORE1. All high
t
AMLF1_AMLDO1
AM_LF_VCORE1 AM_LDO_VCORE1 frequency clock sources (DCO, 110 120 µs
HFXT, MODOSC) disabled. SELM =
2, REFO frequency = 128 kHz.
Copyright © 2015, Texas Instruments Incorporated Specifications 23
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