Datasheet

PRODUCTPREVIEW
MSP432P401R, MSP432P401M
www.ti.com SLAS826 –MARCH 2015
5 Specifications
5.1 Absolute Maximum Ratings
(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
MIN MAX UNIT
Voltage applied at DVCC and AVCC pins to V
SS
–0.3 4.17 V
Voltage difference between DVCC and AVCC pins
(2)
±0.3 V
V
CC
+ 0.3 V
Voltage applied to any pin
(3)
–0.3 V
(4.17 V MAX)
Diode current at any device pin ±2 mA
Storage temperature, T
stg
(4)
–40 125 °C
Maximum junction temperature, T
J
95 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage differences between DVCC and AVCC exceeding the specified limits may cause malfunction of the device.
(3) All voltages referenced to V
SS
.
(4) Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow
temperatures not higher than classified on the device label on the shipping boxes or reels.
5.2 ESD Ratings
VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±1000
V
(ESD)
Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as
±1000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as ±250 V
may actually have higher performance.
5.3 Recommended Operating Conditions
TYP data are based on V
CC
= 3.0 V, T
A
= 25°C (unless otherwise noted)
MIN NOM MAX UNIT
At power-up (with internal V
CC
1.65 3.7
supervision)
Normal operation, Flash not active (with
1.62 3.7
internal V
CC
supervision)
Supply voltage range at all DVCC and
V
CC
V
AVCC pins
(1) (2) (3)
Normal operation, Flash active (with
1.71 3.7
internal V
CC
supervision)
Normal operation, Flash active (without
1.62 3.7
internal V
CC
supervision)
V
SS
Supply voltage on all DVSS and AVSS pins 0 V
I
INRUSH
Inrush current into the V
CC
pins
(4)
100 mA
f
MCLK
Frequency of the CPU and AHB clock in the system
(5)
0 48 MHz
T
A
Operating free-air temperature –40 85 °C
T
J
Operating junction temperature –40 95 °C
(1) TI recommends powering AV
CC
and DV
CC
from the same source. A maximum difference of ±0.1 V between AV
CC
and DV
CC
can be
tolerated during power up and operation. Refer to section Section 5.4 for decoupling capacitor recommendations.
(2) Supply voltage must not change faster than TBD. Faster changes can cause the VCCDET to trigger a reset even within the
recommended supply voltage range.
(3) Modules may have a different supply voltage range specification. See the specification of the respective module in this data sheet.
(4) Does not include I/O currents (driven by application requirements)
(5) Operating frequency may require the flash to be accessed with wait states. Refer to Section 5.8 for further details
Copyright © 2015, Texas Instruments Incorporated Specifications 15
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