Datasheet

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MSP432P401R, MSP432P401M
SLAS826 –MARCH 2015 www.ti.com
Table 6-47. Port P6 (P6.6 and P6.7) Pin Functions
CONTROL BITS OR SIGNALS
(1)
PIN NAME (P6.x) x FUNCTION
P6DIR.x P6SEL1.x P6SEL0.x
P6.6/TA2.3/UCB3SIMO/UCB 6 P6.6 (I/O) I: 0; O: 1 0 0
3SDA/C1.1
TA2.CCI3A 0
0 1
TA2.3 1
UCB3SIMO/UCB3SDA X
(2)
1 0
C1.1
(3)(4)
X 1 1
P6.7/TA2.4/UCB3SOMI/UCB 7 P6.7 (I/O) I: 0; O: 1 0 0
3SCL/C1.0
TA2.CCI4A 0
0 1
TA2.4 1
UCB3SOMI/UCB3SCL X
(2)
1 0
C1.0
(3)(4)
X 1 1
(1) X = Don't care
(2) Direction controlled by eUSCI_B3 module.
(3) Setting P6SEL1.x and P6SEL0.x disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when
applying analog signals.
(4) Setting the CEPD.q bit of the comparator disables the output driver and the input Schmitt trigger to prevent parasitic cross currents
when applying analog signals. Selecting the C1.q input pin to the comparator multiplexer with the CEIPSEL or CEIMSEL bits
automatically disables the output driver and input buffer for that pin, regardless of the state of the associated CEPD.q bit.
124 Detailed Description Copyright © 2015, Texas Instruments Incorporated
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