Datasheet

PRODUCTPREVIEW
MSP432P401R, MSP432P401M
www.ti.com SLAS826 –MARCH 2015
Table 6-37. Port P2 (P2.4 to P2.7) Pin Functions
CONTROL BITS OR SIGNALS
(1)
PIN NAME (P2.x) x FUNCTION
P2DIR.x P2SEL1.x P2SEL0.x P2MAPx
P2.4/PM_TA0.1
(2)
4 P2.4 (I/O) I: 0; O: 1 0 0 X
TA0.CCI1A 0
0 1 default
TA0.1 1
N/A 0
1 0 X
DVSS 1
N/A 0
1 1 X
DVSS 1
P2.5/PM_TA0.2
(2)
5 P2.5 (I/O) I: 0; O: 1 0 0 X
TA0.CCI2A 0
0 1 default
TA0.2 1
N/A 0
1 0 X
DVSS 1
N/A 0
1 1 X
DVSS 1
P2.6/PM_TA0.3
(2)
6 P2.6 (I/O) I: 0; O: 1 0 0 X
TA0.CCI3A 0
0 1 default
TA0.3 1
N/A 0
1 0 X
DVSS 1
N/A 0
1 1 X
DVSS 1
P2.7/PM_TA0.4
(2)
7 P2.7 (I/O) I: 0; O: 1 0 0 X
TA0.CCI4A 0
0 1 default
TA0.4 1
N/A 0
1 0 X
DVSS 1
N/A 0
1 1 X
DVSS 1
(1) X = Don't care
(2) Not available on the 64-pin RGC package.
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