Datasheet
MSP430FR4133, MSP430FR4132, MSP430FR4131
SLAS865B –OCTOBER 2014–REVISED AUGUST 2015
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Table 6-24. Port P8.0 and P8.1 Pin Functions
CONTROL BITS AND SIGNALS
(1)
PIN NAME (P8.x) x FUNCTION
P8DIR.x P8SEL0.x ADCPCTLx
(2)
P8.0 (I/O) I: 0; O: 1 0 0
VSS 0
P8.0/SMCLK/A8 0 1 0
SMCLK 1
A8 X X 1 (x = 8)
P8.1 (I/O) I: 0; O: 1 0 0
VSS 0
P8.1/ACLK/A9 1 1 0
ACLK 1
A9 X X 1 (x = 9)
(1) X = don't care
(2) Setting the ADCPCTLx bit in SYSCFG2 register will disable both the output driver and input Schmitt trigger to prevent leakage when
analog signals are applied.
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