Datasheet
MSP430FR4133, MSP430FR4132, MSP430FR4131
www.ti.com
SLAS865B –OCTOBER 2014–REVISED AUGUST 2015
Table 6-2. Interrupt Sources, Flags, and Vectors (continued)
SYSTEM WORD
INTERRUPT SOURCE INTERRUPT FLAG PRIORITY
INTERRUPT ADDRESS
UCB0RXIFG, UCB0TXIFG (SPI mode)
UCALIFG, UCNACKIFG, UCSTTIFG,
UCSTPIFG, UCRXIFG0, UCTXIFG0,
eUSCI_B0 Receive or Transmit UCRXIFG1, UCTXIFG1, UCRXIFG2, Maskable FFEAh 53
UCTXIFG2, UCRXIFG3, UCTXIFG3,
UCCNTIFG, UCBIT9IFG (I2C mode)
(UCB0IV)
ADCIFG0, ADCINIFG, ADCLOIFG,
ADC ADCHIIFG, ADCTOVIFG, ADCOVIFG Maskable FFE8h 52
(ADCIV)
P1 P1IFG.0 to P1IFG.7 (P1IV) Maskable FFE6h 51
P2 P2IFG.0 to P2IFG.7 (P2IV) Maskable FFE4h 50
LCDBLKOFFIFG, LCDBLKONIFG,
LCD Maskable FFE2h 49, Lowest
LCDFRMIFG (LCDEIV)
Reserved Reserved Maskable FFE0h-FF88h
BSL Signature 2 0FF86h
BSL Signature 1 0FF84h
Signatures
JTAG Signature 2 0FF82h
JTAG Signature 1 0FF80h
6.4 Bootstrap Loader (BSL)
The BSL lets users program the FRAM or RAM using a UART serial interface. Access to the device
memory through the BSL is protected by an user-defined password. Use of the BSL requires four pins as
shown in Table 6-3. BSL entry requires a specific entry sequence on the RST/NMI/SBWTDIO and
TEST/SBWTCK pins. For a complete description of the features of the BSL and its implementation, see
the MSP430FR4xx and MSP430FR2xx Bootstrap Loader (BSL) User's Guide (SLAU610).
Table 6-3. BSL Pin Requirements and Functions
DEVICE SIGNAL BSL FUNCTION
RST/NMI/SBWTDIO Entry sequence signal
TEST/SBWTCK Entry sequence signal
P1.0 Data transmit
P1.1 Data receive
VCC Power supply
VSS Ground supply
6.5 JTAG Standard Interface
The MSP430 family supports the standard JTAG interface which requires four signals for sending and
receiving data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to
enable the JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with
MSP430 development tools and device programmers. The JTAG pin requirements are shown in
Table 6-4. For further details on interfacing to development tools and device programmers, see the
MSP430 Hardware Tools User's Guide (SLAU278). For a complete description of the features of the JTAG
interface and its implementation, see MSP430 Programming Via the JTAG Interface (SLAU320).
Copyright © 2014–2015, Texas Instruments Incorporated Detailed Description 37
Submit Documentation Feedback
Product Folder Links: MSP430FR4133 MSP430FR4132 MSP430FR4131