Datasheet

MSP430FR4133, MSP430FR4132, MSP430FR4131
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SLAS865B OCTOBER 2014REVISED AUGUST 2015
5.12.7 ADC
Table 5-17. ADC, Power Supply and Input Range Conditions
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
DV
CC
ADC supply voltage 2.0 3.6 V
V
(Ax)
Analog input voltage range All ADC pins 0 DV
CC
V
Operating supply current into 2 V 185
f
ADCCLK
= 5 MHz, ADCON = 1,
DVCC terminal, reference
I
ADC
REFON = 0, SHT0 = 0, SHT1 = 0, ADCDIV µA
current not included, repeat-
3 V 207
= 0, ADCCONSEQx = 10b
single-channel mode
Only one terminal Ax can be selected at one
C
I
Input capacitance time from the pad to the ADC capacitor array, 2.2 V 1.6 2.0 pF
including wiring and pad
R
I
Input MUX ON resistance DV
CC
= 2 V, 0 V = V
Ax
= DV
CC
2 kΩ
Table 5-18. ADC, 10-Bit Timing Parameters
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
For specified performance of ADC linearity 2 V to
f
ADCCLK
0.45 5 5.5 MHz
parameters 3.6 V
Internal ADC oscillator 2 V to
f
ADCOSC
ADCDIV = 0, f
ADCCLK
= f
ADCOSC
4.5 5.0 5.5 MHz
(MODOSC) 3.6 V
REFON = 0, Internal oscillator,
2 V to
10 ADCCLK cycles, 10-bit mode, 2.18 2.67
3.6 V
f
ADCOSC
= 4.5 MHz to 5.5 MHz
t
CONVERT
Conversion time µs
External f
ADCCLK
from ACLK, MCLK, or SMCLK, 2 V to
(1)
ADCSSEL 0 3.6 V
The error in a conversion started after t
ADCON
is less
Turn on settling time of
t
ADCON
than ± 0.5 LSB, 100 ns
the ADC
Reference and input signal already settled
R
S
= 1000 Ω, R
I
= 36000 Ω, C
I
= 3.5 pF, 2 V 1.5
t
Sample
Sampling time Approximately eight Tau (t) are required for an error µs
3 V 2.0
of less than ± 0.5 LSB
(1) 12 × ADCDIV × 1/f
ADCCLK
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