Datasheet
MSP430FR4133, MSP430FR4132, MSP430FR4131
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SLAS865B –OCTOBER 2014–REVISED AUGUST 2015
5.12.2 Reset Timing
Table 5-2. Wake-Up Times From Low-Power Modes and Reset
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST
PARAMETER V
CC
MIN TYP MAX UNIT
CONDITIONS
Additional wake-up time to activate the FRAM in
AM if previously disabled by the FRAM controller or
t
WAKE-UP FRAM
3 V 10 µs
from a LPM if immediate activation is selected for
wake-up
(1)
200 ns +
t
WAKE-UP LPM0
Wake-up time from LPM0 to active mode
(1)
3 V
2.5/f
DCO
t
WAKE-UP LPM3
Wake-up time from LPM3 to active mode
(2)
3 V 10 µs
t
WAKE-UP LPM4
Wake-up time from LPM4 to active mode 3 V 10 µs
t
WAKE-UP LPM3.5
Wake-up time from LPM3.5 to active mode
(2)
3 V 350 µs
SVSHE = 1 3 V 350 µs
t
WAKE-UP LPM4.5
Wake-up time from LPM4.5 to active mode
(2)
SVSHE = 0 3 V 1 ms
Wake-up time from RST or BOR event to active
t
WAKE-UP-RESET
3 V 1 ms
mode
(2)
Pulse duration required at RST/NMI pin to accept a
t
RESET
3 V 2 µs
reset
(1) The wake-up time is measured from the edge of an external wake-up signal (for example, port interrupt or wake-up event) to the first
externally observable MCLK clock edge.
(2) The wake-up time is measured from the edge of an external wake-up signal (for example, port interrupt or wake-up event) until the first
instruction of the user program is executed.
Copyright © 2014–2015, Texas Instruments Incorporated Specifications 21
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