Datasheet
MSP430FR4133, MSP430FR4132, MSP430FR4131
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SLAS865B –OCTOBER 2014–REVISED AUGUST 2015
5.10 Typical Characteristics, Current Consumption Per Module
MODULE TEST CONDITIONS REFERENCE CLOCK TYP UNIT
Timer_A Module input clock 5 µA/MHz
eUSCI_A UART mode Module input clock 7 µA/MHz
eUSCI_A SPI mode Module input clock 5 µA/MHz
eUSCI_B SPI mode Module input clock 5 µA/MHz
eUSCI_B I
2
C mode, 100 kbaud Module input clock 5 µA/MHz
RTC 32 kHz 85 nA
CRC From start to end of operation MCLK 8.5 µA/MHz
5.11 Thermal Characteristics
PARAMETER VALUE UNIT
θ
JA
Junction-to-ambient thermal resistance, still air
(1)
61.7 °C/W
θ
JC, (TOP)
Junction-to-case (top) thermal resistance
(2)
25.4 °C/W
θ
JB
Junction-to-board thermal resistance
(3)
LQFP-64 (PM) 32.7 °C/W
Ψ
JB
Junction-to-board thermal characterization parameter 32.4 °C/W
Ψ
JT
Junction-to-top thermal characterization parameter 2.5 °C/W
θ
JA
Junction-to-ambient thermal resistance, still air(
(1)
62.4 °C/W
θ
JC, (TOP)
Junction-to-case (top) thermal resistance
(2)
18.7 °C/W
θ
JB
Junction-to-board thermal resistance
(3)
TSSOP-56 (DGG56) 31.4 °C/W
Ψ
JB
Junction-to-board thermal characterization parameter 31.1 °C/W
Ψ
JT
Junction-to-top thermal characterization parameter 0.8 °C/W
θ
JA
Junction-to-ambient thermal resistance, still air(
(1)
68.9 °C/W
θ
JC, (TOP)
Junction-to-case (top) thermal resistance
(2)
23 °C/W
θ
JB
Junction-to-board thermal resistance
(3)
TSSOP-48 (DGG48) 35.8 °C/W
Ψ
JB
Junction-to-board thermal characterization parameter 35.3 °C/W
Ψ
JT
Junction-to-top thermal characterization parameter 1.1 °C/W
(1) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2) The junction-to-case (top) thermal resistance is obtained by simulating a cold place test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold place fixture to control the PCB
temperature, as described in JESD51-8.
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