Datasheet
MSP430FR4133, MSP430FR4132, MSP430FR4131
www.ti.com
SLAS865B –OCTOBER 2014–REVISED AUGUST 2015
5.8 Low-Power Mode LPMx.5 Supply Currents (Into V
CC
) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
–40°C 25°C 85°C
PARAMETER V
CC
UNIT
TYP MAX TYP MAX TYP MAX
3 V 0.71 0.77 1.25 1.06 2.06
Low-power mode 3.5, includes SVS
(1)(2) (3)
I
LPM3.5, XT1
µA
(also refer to Figure 5-3)
2 V 0.66 0.70 0.95
I
LPM3.5, LCD, CP
Low-power mode 3.5, excludes SVS
(4)
3 V 0.90 0.94 1.27 µA
3 V 0.23 0.25 0.375 0.32 0.43
I
LPM4.5, SVS
Low-power mode 4.5, includes SVS
(5)
µA
2 V 0.20 0.20 0.24
3 V 0.010 0.015 0.070 0.073 0.140
I
LPM4.5
Low-power mode 4.5, excludes SVS
(6)
µA
2 V 0.008 0.013 0.060
(1) Not applicable for devices with HF crystal oscillator only.
(2) Characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance chosen to closely match the required load.
(3) Low-power mode 3.5, includes SVS test conditions:
Current for RTC clocked by XT1 included. Current for brownout and SVS included (SVSHE = 1). Core regulator disabled.
PMMREGOFF = 1, CPUOFF = 1, SCG0 = 1 SCG1 = 1, OSCOFF = 1 (LPMx.5),
f
XT1
= 32768 Hz, f
ACLK
= f
XT1
, f
MCLK
= f
SMCLK
= 0 MHz
(4) LCD works in LPM3.5 if the internal charge pump and VREF switch mode are enabled. The LCD driver pins are configured as 4x36 at
32‑Hz frame frequency with an external 32768‑Hz clock source.
(5) Low-power mode 4.5, includes SVS test conditions:
Current for brownout and SVS included (SVSHE = 1). Core regulator disabled.
PMMREGOFF = 1, CPUOFF = 1, SCG0 = 1 SCG1 = 1, OSCOFF = 1 (LPMx.5),
f
XT1
= 0 Hz, f
ACLK
= f
MCLK
= f
SMCLK
= 0 MHz
(6) Low-power mode 4.5, excludes SVS test conditions:
Current for brownout included. SVS disabled (SVSHE = 0). Core regulator disabled.
PMMREGOFF = 1, CPUOFF = 1, SCG0 = 1 SCG1 = 1, OSCOFF = 1 (LPMx.5),
f
XT1
= 0 Hz, f
ACLK
= f
MCLK
= f
SMCLK
= 0 MHz
Copyright © 2014–2015, Texas Instruments Incorporated Specifications 17
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