Datasheet

 
 
SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
www.ti.com
86
Timer 2 Control (T2CON)
7 6 5 4 3 2 1 0 Reset Value
SFR C8h TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2 00h
TF2 Timer 2 Overflow Flag. This flag will be set when Timer 2 overflows from FFFFh. It must be cleared by software.
bit 7 TF2 will only be set if RCLK and TCLK are both cleared to ‘0’. Writing a ‘1’ to TF2 forces a Timer 2 interrupt if enabled.
EXF2 Timer 2 External Flag. A negative transition on the T2EX pin (P1.1) will cause this flag to be set based on the EXEN2
bit 6 (T2CON.3) bit. If set by a negative transition, this flag must be cleared to ‘0’ by software. Setting this bit in software
will force a timer interrupt if enabled.
RCLK Receive Clock Flag. This bit determines the serial Port 0 timebase when receiving data in serial modes 1 or 3.
bit 5 0 = Timer 1 overflow is used to determine receiver baud rate for USART0.
1 = Timer 2 overflow is used to determine receiver baud rate for USART0.
Setting this bit will force Timer 2 into baud rate generation mode. The timer will operate from a divide by 2 of the
external clock.
TCLK Transmit Clock Flag. This bit determines the serial Port 0 timebase when transmitting data in serial modes 1 or 3.
bit 4 0 = Timer 1 overflow is used to determine transmitter baud rate for USART0.
1 = Timer 2 overflow is used to determine transmitter baud rate for USART0.
Setting this bit will force Timer 2 into baud rate generation mode. The timer will operate from a divide by 2 of the
external clock.
EXEN2 Timer 2 External Enable. This bit enables the capture/reload function on the T2EX pin if Timer 2 is not generating
bit 3 baud rates for the serial port.
0 = Timer 2 will ignore all external events at T2EX.
1 = Timer 2 will capture or reload a value if a negative transition is detected on the T2EX pin.
TR2 Timer 2 Run Control. This bit enables/disables the operation of Timer 2. Halting this timer will preserve the current
bit 2 count in TH2, TL2.
0 = Timer 2 is halted.
1 = Timer 2 is enabled.
C/T2 Counter/Timer Select. This bit determines whether Timer 2 will function as a timer or counter. Independent of this
bit 1 bit, Timer 2 runs at 2 clocks per tick when used in baud rate generator mode.
0 = Timer 2 functions as a timer. The speed of Timer 2 is determined by the T2M bit (CKCON.5).
1 = Timer 2 will count negative transitions on the T2 pin (P1.0).
CP/RL2 Capture/Reload Select. This bit determines whether the capture or reload function will be used for Timer 2. If either
bit 0 RCLK or TCLK is set, this bit will not function and the timer will function in an auto-reload mode following each
overflow.
0 = Auto-reloads will occur when Timer 2 overflows or a falling edge is detected on T2EX if EXEN2 = 1.
1 = Timer 2 captures will occur when a falling edge is detected on T2EX if EXEN2 = 1.
Timer 2 Capture LSB (RCAP2L)
7 6 5 4 3 2 1 0 Reset Value
SFR CAh 00h
RCAP2L Timer 2 Capture LSB. This register is used to capture the TL2 value when Timer 2 is configured in capture mode.
bits 7−0 RCAP2L is also used as the LSB of a 16-bit reload value when Timer 2 is configured in auto-reload mode.