Datasheet

 
 
SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
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81
DAC1 Control (DACCON1)
DACSEL = 04h 7 6 5 4 3 2 1 0 Reset Value
SFR B6h COR1 EOD1 IDAC1DIS IDAC1SINK 0 SELREF1 DOM1_1 DOM1_0 63h
COR1 Current Over Range on DAC1
bit 7 Write: 0 = Clear to release from high-impedance state back to normal mode unless an over-range condition exists.
1 = No effect.
Read: 0 = No current over range for DAC1.
0 = No effect.
1 = IDAC overcurrent for three consecutive ticks on ms clock USEC (EOD1 = 1) or Current Over Range raw
signal (EOD0 = 0).
EOD1 Enable Over-Current Detection
bit 6 0 = Disable over-current detection.
1 = Enable over-current detection (default). After three consecutive ticks on MSEC clock of overcurrent, the DAC is
disabled; however, the register values are preserved. Writing to COR1 releases the high-impedance state.
IDAC1DIS IDAC1 Disable (for DOM1 = 00)
bit 5 0 = IDAC on mode for DAC1.
1 = IDAC off mode for DAC1 (default).
IDAC1SINK ENABLE CURRENT SINK
bit 4 0 = DAC1 is sourcing current.
1 = DAC1 is sinking current using external device.
Not Used
bit 3
SELREF1 Select the Reference Voltage for DAC1 Voltage Reference.
bit 2 0 = DAC1 V
REF
= AV
DD
(default).
1 = DAC1 V
REF
= voltage on V
REF
IN pins.
DOM1_1−0 DAC Output Mode DAC1.
bits 1−0
DOM1 OUTPUT MODE for DAC1
00 Normal VDAC output; IDAC controlled by IDAC1DIS bit.
01 Power-Down mode—VDAC output off 1kΩ to AGND, IDAC off.
10 Power-Down mode—VDAC output off 100kΩ to AGND, IDAC off.
11 Power-Down mode—VDAC output off high impedance, IDAC off (default).