Datasheet

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SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
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60
SPI Transmit Control (SPITCON)
7 6 5 4 3 2 1 0 Reset Value
SFR 9Dh
TXCNT7
TXFLUSH
TXCNT6
TXCNT5
CLK_EN
TXCNT4
DRV_DLY
TXCNT3
DRV_EN
TXCNT2
TXIRQ2
TXCNT1
TXIRQ1
TXCNT0
TXIRQ0
00h
TXCNT Transmit Counter. Read-only bits which read the number of bytes in the transmit buffer (0 to 128).
bits 7−0
TXFLUSH Flush Transmit FIFO. This bit is write-only. When set, the SPI transmit pointer is set equal to the FIFO Output pointer.
bit 7 This bit is 0 for a read operation.
CLK_EN SCLK Driver Enable.
bit 5 0: Disable SCLK Driver (Master Mode)
1: Enable SCLK Driver (Master Mode)
DRV_DLY Drive Delay (refer to DRV_EN bit).
bit 4 0: Drive Output Immediately
1: Drive Output After Current Byte Transfer
DRV_EN Drive Enable.
bit 3
DRV_DLY DRV_EN MOSI or MISO OUTPUT CONTROL
0 0 Tristate immediately.
0 1 Drive immediately.
1 0 Tristate after the current byte transfer.
1 1 Drive after the current byte transfer.
TXIRQ Transmit IRQ Level. Write-only bits.
bits 2−0
000 Generate IRQ when Transmit Count = 1 or less.
001 Generate IRQ when Transmit Count = 2 or less.
010 Generate IRQ when Transmit Count = 4 or less.
011 Generate IRQ when Transmit Count = 8 or less.
100 Generate IRQ when Transmit Count = 16 or less.
101 Generate IRQ when Transmit Count = 32 or less.
110 Generate IRQ when Transmit Count = 64 or less.
111 Generate IRQ when Transmit Count = 128 or less.