Datasheet

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SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
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6
ELECTRICAL CHARACTERISTICS: AV
DD
= 3V (continued)
All specifications from T
MIN
to T
MAX
, DV
DD
= +2.7V to 5.25V, AV
DD
= +3V, f
MOD
= 15.625kHz, PGA = 1, filter = Sinc
3
, Buffer ON, f
DATA
= 10Hz, Bipolar, f
CLK
= 8MHz,
and V
REF
≡ (REF IN+) − (REF IN−) = +1.25V, unless otherwise noted. For V
DAC
, V
REF
= AV
DD
, R
LOAD
= 10kΩ, and C
LOAD
= 200pF, unless otherwise noted.
MSC1211/12/13/14
PARAMETER UNITSMAXTYPMINCONDITIONS
ADC Offset DAC
Offset DAC Range Bipolar Mode ±V
REF
/(2•PGA) V
Offset DAC Monotonicity 8 Bits
Offset DAC Gain Error ±1.5 % of Range
Offset DAC Gain Error Drift 1 ppm/°C
System Performance
Resolution 24 Bits
ENOB 22 Bits
Output Noise See Typical Characteristics
No Missing Codes Sinc
3
Filter 24 Bits
Integral Nonlinearity End Point Fit, Bipolar Mode 0.0003 ±0.0015 %FSR
Offset Error After Calibration ±3.5 ppm of FS
Offset Drift
(2)
Before Calibration 0.1 ppm of FS/°C
Gain Error
(3)
After Calibration −0.002 %
Gain Error Drift
(2)
Before Calibration 1.0 ppm/°C
System Gain Calibration Range 80 120 % of FS
System Offset Calibration Range −50 50 % of FS
At DC 115 dB
Common-Mode Rejection
f
CM
= 60Hz, f
DATA
= 10Hz 130 dB
Common-Mode Rejection
f
CM
= 50Hz, f
DATA
= 50Hz 120 dB
f
CM
= 60Hz, f
DATA
= 60Hz 120 dB
Normal Mode Rejection
f
SIG
= 50Hz, f
DATA
= 50Hz 100 dB
Normal Mode Rejection
f
SIG
= 60Hz, f
DATA
= 60Hz 100 dB
Power-Supply Rejection At DC, dB = −20log(∆VOUT/∆V
DD
)
(4)
92 dB
Voltage Reference Inputs
Reference Input Range REF IN+, REF IN− AGND AV
DD
(3)
V
V
REF
V
REF
≡ (REF IN+) − (REF IN−) 0.1 1.25 AV
DD
V
V
REF
Common-Mode Rejection At DC 110 dB
Input Current
(5)
V
REF
= 1.25V, ADC Only 3 µA
DAC Reference Input Resistance For Each DAC, PGA = 1 20 kΩ
On-Chip Voltage Reference
Output Voltage VREFH = 0 at +25°C, REFCLK = 250kHz 1.245 1.25 1.255 V
Power-Supply Rejection Ratio 65 dB
Short-Circuit Current Source 2.6 mA
Short-Circuit Current Sink 50 µA
Short-Circuit Duration Sink or Source Indefinite
Drift 5 ppm/°C
Output Impedance Sourcing 100µA 3 Ω
Startup Time from Power ON C
REFOUT
= 0.1µF 8 ms
Temperature Sensor Voltage Buffer ON, T = +25°C 115 mV
Temperature Sensor Coefficient Buffer ON 375 µV/°C
(1)
The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7MΩ/64).
(2)
Calibration can minimize these errors.
(3)
The gain calibration cannot have a REF IN+ of more than AV
DD
−1.5V with Buffer ON. To calibrate gain, turn Buffer OFF.
(4)
∆V
OUT
is change in digital result.
(5)
9pF switched capacitor at f
SAMP
clock frequency (see Figure 14).
(6)
Linearity calculated using a reduced code range of 512 to 65024; output unloaded.
(7)
Ensured by design and characterization; not production tested.
(8)
Analog Brownout Detect OFF (HCR1.3 = 1), Analog LVD OFF (LVDCON.7 = 1).