Datasheet
SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
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54
Memory Write Select (MWS)
7 6 5 4 3 2 1 0 Reset Value
SFR 8Fh 0 0 0 0 0 0 0 MXWS 00h
MXWS MOVX Write Select. This allows writing to the internal Flash Program Memory.
bit 0 0: MOVX operations will access Data Memory (default).
1: MOVX operations will access Program Memory. Write operations can be inhibited by the PML or RSL bits in HCR0.
Port 1 (P1)
7 6 5 4 3 2 1 0 Reset Value
SFR 90h
P1.7
INT5
/SCK/SCL
P1.6
INT4/MISO/SDA
P1.5
INT3
/MOSI
P1.4
INT2/SS
P1.3
TXD1
P1.2
RXD1
P1.1
T2EX
P1.0
T2
FFh
P1.7−0 General-Purpose I/O Port 1. This register functions as a general-purpose I/O port. In addition, all the pins have an
bits 7−0 alternative function listed below. Each of the functions is controlled by several other SFRs. The associated Port 1
latch bit must contain a logic ‘1’ before the pin can be used in its alternate function capacity. To use the alternate
function, set the appropriate mode in P1DDRL (SFR AEh), P1DDRH (SFR AFh).
INT5
/SCK/SCL External Interrupt 5. A falling edge on this pin will cause an external interrupt 5 if enabled.
bit 7 SPI Clock. The master clock for SPI data transfers.
Serial Clock. The serial clock for I
2
C data transfers (MSC1211 and MSC1213 only).
INT4/MISO/SDA External Interrupt 4. A rising edge on this pin will cause an external interrupt 4 if enabled.
bit 6 Master In Slave Out. For SPI data transfers, this pin receives data for the master and transmits data from the slave.
SDA. For I
2
C data transfers, this pin is the data line (MSC1211 and MSC1213 only).
NT3/MOSI External Interrupt 3. A falling edge on this pin will cause an external interrupt 3 if enabled.
bit 5 Master Out Slave In. For SPI data transfers, this pin transmits master data and receives slave data.
INT2/SS External Interrupt 2. A rising edge on this pin will cause an external interrupt 2 if enabled.
bit 4 Slave Select. During SPI operation, this pin provides the select signal for the slave device.
TXD1 Serial Port 1 Transmit. This pin transmits the serial Port 1 data in serial port modes 1, 2, 3, and emits the
bit 3 synchronizing clock in serial port mode 0.
RXD1 Serial Port 1 Receive. This pin receives the serial Port 1 data in serial port modes 1, 2, 3, and is a bidirectional data
bit 2 transfer pin in serial port mode 0.
T2EX Timer 2 Capture/Reload Trigger. A 1 to 0 transition on this pin will cause the value in the T2 registers to be
bit 1 transferred into the capture registers if enabled by EXEN2 (T2CON.3, SFR C8h). When in auto-reload mode, a 1 to
0 transition on this pin will reload the Timer 2 registers with the value in RCAP2L and RCAP2H if enabled by EXEN2
(T2CON.3, SFR C8h).
T2 Timer 2 External Input. A 1 to 0 transition on this pin will cause Timer 2 to increment or decrement depending on
bit 0 the timer configuration.