Datasheet

 
 
SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
www.ti.com
3
MSC121xYX FAMILY FEATURES
FEATURES
(1)
MSC121xY2
(2)
MSC121xY3
(2)
MSC121xY4
(2)
MSC121xY5
(2)
Flash Program Memory (Bytes) Up to 4k Up to 8k Up to 16k Up to 32k
Flash Data Memory (Bytes) Up to 4k Up to 8k Up to 16k Up to 32k
Internal Scratchpad SRAM (Bytes) 256 256 256 256
Internal MOVX RAM (Bytes) 1024 1024 1024 1024
Externally Accessible Memory (Bytes) 64k Program, 64k Data 64k Program, 64k Data 64k Program, 64k Data 64k Program, 64k Data
(1)
All peripheral features are the same on all devices; the flash memory size is the only difference.
(2)
The last digit of the part number (N) represents the onboard flash size = (2
N
)kBytes.
ELECTRICAL CHARACTERISTICS: AV
DD
= 5V
All specifications from T
MIN
to T
MAX
, DV
DD
= +2.7V to 5.25V, AV
DD
= +5V, f
MOD
= 15.625kHz, PGA = 1, filter = Sinc
3
, Buffer ON, f
DATA
= 10Hz, Bipolar, f
CLK
= 8MHz,
and V
REF
≡ (REF IN+) − (REF IN−) = +2.5V, unless otherwise noted. For V
DAC
, V
REF
= AV
DD
, R
LOAD
= 10kΩ, and C
LOAD
= 200pF, unless otherwise noted.
MSC1211/12/13/14
PARAMETER CONDITIONS MIN TYP MAX UNITS
Analog Inputs (AIN0−AIN7, AINCOM)
Analog Input Range
Buffer OFF AGND − 0.1 AV
DD
+ 0.1 V
Analog Input Range
Buffer ON AGND + 50mV AV
DD
− 1.5 V
Full-Scale Input Voltage Range (AIN+) − (AIN−) ±V
REF
/PGA V
Differential Input Impedance Buffer OFF 7/PGA
(1)
MΩ
Input Current Buffer ON 0.5 nA
Fast Settling Filter −3dB 0.469 • f
DATA
Bandwidth
Sinc
2
Filter −3dB 0.318 • f
DATA
Bandwidth
Sinc
3
Filter −3dB 0.262 • f
DATA
Programmable Gain Amplifier User-Selectable Gain Range 1 128
Input Capacitance Buffer ON 9 pF
Input Leakage Current Multiplexer Channel OFF, T = +25°C 0.5 pA
Burnout Current Sources Buffer ON ±2 µA
ADC Offset DAC
Offset DAC Range Bipolar Mode ±V
REF
/(2 • PGA) V
Offset DAC Monotonicity 8 Bits
Offset DAC Gain Error ±1.5 % of Range
Offset DAC Gain Error Drift 1 ppm/°C
System Performance
Resolution 24 Bits
ENOB See Typical Characteristics 22 Bits
Output Noise See Typical Characteristics
No Missing Codes Sinc
3
Filter, Decimation > 360 24 Bits
Integral Nonlinearity End Point Fit, Bipolar Mode 0.0003 ±0.0015 %FSR
Offset Error After Calibration ±3.5 ppm of FS
Offset Drift
(2)
Before Calibration 0.1 ppm of FS/°C
Gain Error
(3)
After Calibration −0.002 %
Gain Error Drift
(2)
Before Calibration 0.5 ppm/°C
System Gain Calibration Range 80 120 % of FS
System Offset Calibration Range −50 50 % of FS
At DC 115 dB
Common-Mode Rejection
f
CM
= 60Hz, f
DATA
= 10Hz 130 dB
Common-Mode Rejection
f
CM
= 50HZ, f
DATA
= 50Hz 120 dB
f
CM
= 60Hz, f
DATA
= 60Hz 120 dB
Normal-Mode Rejection
f
SIG
= 50Hz, f
DATA
= 50Hz 100 dB
Normal-Mode Rejection
f
SIG
= 60Hz, f
DATA
= 60Hz 100 dB
Power-Supply Rejection At DC, dB = −20log(∆VOUT/∆V
DD
)
(4)
92 dB
(1)
The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7MΩ/64).
(2)
Calibration can minimize these errors.
(3)
The self gain calibration cannot have a REF IN+ of more than AV
DD
−1.5V with Buffer ON. To calibrate gain, turn Buffer OFF.
(4)
∆V
OUT
is change in digital result.
(5)
9pF switched capacitor at f
SAMP
clock frequency (see Figure 14).
(6)
Linearity calculated using a reduced code range of 512 to 65024; output unloaded.
(7)
Ensured by design and characterization; not production tested.
(8)
Analog Brownout Detect OFF (HCR1.3 = 1), Analog LVD OFF (LVDCON.7 = 1).