Datasheet

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SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
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Breakpoint Control (BPCON)
7 6 5 4 3 2 1 0 Reset Value
SFR A9h BP 0 0 0 0 0 PMSEL EBP 00h
Writing to this register sets the breakpoint condition specified by MCON, BPL, and BPH.
BP Breakpoint Interrupt. This bit indicates that a break condition has been recognized by a hardware breakpoint register(s).
bit 7 Read: Status of Breakpoint Interrupt. Will indicate a breakpoint match for any of the breakpoint registers.
Write: 0: No effect.
1: Clear Breakpoint 1 for breakpoint register selected by MCON (SFR 95h).
PMSEL Program Memory Select. Write this bit to select memory for address breakpoints of register selected in
bit 1 MCON (SFR 95h).
0: Break on address in Data Memory.
1: Break on address in Program Memory.
EBP Enable Breakpoint. This bit enables this breakpoint register. Address of breakpoint register selected by
bit 0 MCON (SFR 95h).
0: Breakpoint disabled.
1: Breakpoint enabled.
Breakpoint Low (BPL) Address for BP Register Selected in MCON (95h)
7 6 5 4 3 2 1 0 Reset Value
SFR AAh BPL.7 BPL.6 BPL.5 BPL.4 BPL.3 BPL.2 BPL.1 BPL.0 00h
BPL.7−0 Breakpoint Low Address. The low 8 bits of the 16-bit breakpoint address.
bits 7−0
Breakpoint High Address (BPH) Address for BP Register Selected in MCON (95h)
7 6 5 4 3 2 1 0 Reset Value
SFR ABh BPH.7 BPH.6 BPH.5 BPH.4 BPH.3 BPH.2 BPH.1 BPH.0 00h
BPH.7−0 Breakpoint High Address. The high 8 bits of the 16-bit breakpoint address.
bits 7−0