Datasheet

 
 
SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
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47
Table 10. Special Function Register Cross Reference (continued)
SFR
DACADC
FLASH
MEMORY
PWM
TIMER
COUNTERS
POWER
AND
CLOCKS
SERIAL
COMM.
PORTSINTERRUPTSCPU
FUNCTIONS
ADDRESS
BPCON A9h Breakpoint Control X X
BPL AAh Breakpoint Low Address X X
BPH ABh Breakpoint High Address X X
P0DDRL ACh Port 0 Data Direction Low X
P0DDRH ADh Port 0 Data Direction High X
P1DDRL AEh Port 1 Data Direction Low X
P1DDRH AFh Port 1 Data Direction High X
P3 B0h Port 3 X
P2DDRL B1h Port 2 Data Direction Low X
P2DDRH B2h Port 2 Data Direction High X
P3DDRL B3h Port 3 Data Direction Low X
P3DDRH B4h Port 3 Data Direction High X
DACL B5h DAC Low Byte X
DACH B6h DAC High Byte X
DACSEL B7h DAC Select X
DACCON B7h DAC Control X
IP B8h Interrupt Priority X
SCON1 C0h Serial Port 1 Control X X
SBUF1 C1h Serial Data Buffer 1 X
EWU C6h Enable Wake Up X X
SYSCLK C7h System Clock Divider X X X X X X
T2CON C8h Timer 2 Control X X
RCAP2L CAh Timer 2 Capture LSB X X
RCAP2H CBh Timer 2 Capture MSB X X
TL2 CCh Timer 2 LSB X
TH2 CDh Timer 2 MSB X
PSW D0h Program Status Word X
OCL D1h ADC Offset Calibration Low Byte X
OCM D2h ADC Offset Calibration Mid Byte X
OCH D3h ADC Offset Calibration High Byte X
GCL D4h ADC Gain Calibration Low Byte X
GCM D5h ADC Gain Calibration Mid Byte X
GCH D6h ADC Gain Calibration High Byte X
ADMUX D7h ADC Input Multiplexer X
EICON D8h Enable Interrupt Control X X X X
ADRESL D9h ADC Results Low Byte X
ADRESM DAh ADC Results Middle Byte X
ADRESH DBh ADC Results High Byte X
ADCON0 DCh ADC Control 0 X
ADCON1 DDh ADC Control 1 X
ADCON2 DEh ADC Control 2 X
ADCON3 DFh ADC Control 3 X
ACC E0h Accumulator X
SSCON E1h Summation/Shifter Control X X
SUMR0 E2h Summation 0 X X
SUMR1 E3h Summation 1 X X
SUMR2 E4h Summation 2 X X
SUMR3 E5h Summation 3 X X