Datasheet

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SBAS203J − MARCH 2002 − REVISED JANUARY 2008
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74
ADC Offset Calibration Register Low Byte (OCL)
7 6 5 4 3 2 1 0 Reset Value
SFR D1h LSB 00h
OCL ADC Offset Calibration Register Low Byte. This is the low byte of the 24-bit word that contains the ADC offset
bits 7−0 calibration. A value that is written to this location will set the ADC offset calibration value.
ADC Offset Calibration Register Middle Byte (OCM)
7 6 5 4 3 2 1 0 Reset Value
SFR D2h 00h
OCM ADC Offset Calibration Register Middle Byte. This is the middle byte of the 24-bit word that contains the ADC offset
bits 7−0 calibration. A value that is written to this location will set the ADC offset calibration value.
ADC Offset Calibration Register High Byte (OCH)
7 6 5 4 3 2 1 0 Reset Value
SFR D3h MSB 00h
OCH ADC Offset Calibration Register High Byte. This is the high byte of the 24-bit word that contains the ADC offset
bits 7−0 calibration. A value that is written to this location will set the ADC offset calibration value.
ADC Gain Calibration Register Low Byte (GCL)
7 6 5 4 3 2 1 0 Reset Value
SFR D4h LSB 5Ah
GCL ADC Gain Calibration Register Low Byte. This is the low byte of the 24-bit word that contains the ADC gain
bits 7−0 calibration. A value that is written to this location will set the ADC gain calibration value.
ADC Gain Calibration Register Middle Byte (GCM)
7 6 5 4 3 2 1 0 Reset Value
SFR D5h ECh
GCM ADC Gain Calibration Register Middle Byte. This is the middle byte of the 24-bit word that contains the ADC gain
bits 7−0 calibration. A value that is written to this location will set the ADC gain calibration value.
ADC Gain Calibration Register High Byte (GCH)
7 6 5 4 3 2 1 0 Reset Value
SFR D6h MSB 5Fh
GCH ADC Gain Calibration Register High Byte. This is the high byte of the 24-bit word that contains the ADC gain
bits 7−0 calibration. A value that is written to this location will set the ADC gain calibration value.