Datasheet

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SBAS203J − MARCH 2002 − REVISED JANUARY 2008

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Auxiliary Interrupt Status Register (AISTAT)

7 6 5 4 3 2 1 0 Reset Value

SFR A7h SEC SUM ADC MSEC SPIT SPIR ALVD DLVD 00h

SEC Second System Timer Interrupt Status Flag (lowest priority AI).

bit 7 0: SEC interrupt inactive or masked.

1: SEC Interrupt active. (It is set inactive by reading the SECINT register.)

SUM Summation Register Interrupt Status Flag.

bit 6 0: SUM interrupt inactive or masked.

1: SUM interrupt active. (It is set inactive by reading the lowest byte of the Summation register.)

ADC ADC Interrupt Status Flag.

bit 5 0: ADC interrupt inactive or masked (If active, it is set inactive by reading the lowest byte of the Data Output Register).

1: ADC interrupt active. (If active, no new data will be written to the Data Output Register.)

MSEC Millisecond System Timer Interrupt Status Flag.

bit 4 0: MSEC interrupt inactive or masked.

1: MSEC interrupt active. (It is set inactive by reading the MSINT register.)

SPIT SPI Transmit Interrupt Status Flag.

bit 3 0: SPI transmit interrupt inactive or masked.

1: SPI transmit interrupt active. (It is set inactive by writing to the SPIDATA register.)

SPIR SPI Receive Interrupt Status Flag.

bit 2 0: SPI receive interrupt inactive or masked.

1: SPI receive interrupt active. (It is set inactive by reading from the SPIDATA register.)

ALVD Analog Low Voltage Detect Interrupt Status Flag.

bit 1 0: ALVD interrupt inactive or masked.

1: ALVD interrupt active. (Interrupt stays active until the AV

voltage exceeds the threshold.)

DLVD Digital Low Voltage Detect or Breakpoint Interrupt Status Flag (highest priority AI).

bit 0 0: DLVD interrupt inactive or masked.

1: DLVD interrupt active. (Interrupt stays active until the DV

voltage exceeds the threshold or the Breakpoint is

cleared.)