Datasheet

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SBAS203J − MARCH 2002 − REVISED JANUARY 2008
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Data Pointer High 1 (DPH1)
7 6 5 4 3 2 1 0 Reset Value
SFR 85h DPH1.7 DPH1.6 DPH1.5 DPH1.4 DPH1.3 DPH1.2 DPH1.1 DPH1.0 00h
DPH1.7−0 Data Pointer High. This register is the high byte of the auxiliary 16-bit data pointer. When the SEL bit (DPS.0,
bits 7−0 SFR 86h) is set, DPL1 and DPH1 are used in place of DPL0 and DPH0 during DPTR operations.
Data Pointer Select (DPS)
7 6 5 4 3 2 1 0 Reset Value
SFR 86h 0 0 0 0 0 0 0 SEL 00h
SEL Data Pointer Select. This bit selects the active data pointer.
bit 0 0: Instructions that use the DPTR will use DPL0 and DPH0.
1: Instructions that use the DPTR will use DPL1 and DPH1.
Power Control (PCON)
7 6 5 4 3 2 1 0 Reset Value
SFR 87h SMOD 0 1 1 GF1 GF0 STOP IDLE 30h
SMOD Serial Port 0 Baud Rate Doubler Enable. The serial baud rate doubling function for Serial Port 0.
bit 7 0: Serial Port 0 baud rate will be a standard baud rate.
1: Serial Port 0 baud rate will be double that defined by baud rate generation equation when using Timer 1.
GF1 General-Purpose User Flag 1. This is a general-purpose flag for software control.
bit 3
GF0 General-Purpose User Flag 0. This is a general-purpose flag for software control.
bit 2
STOP Stop Mode Select. Setting this bit will halt the oscillator and block external clocks. This bit will always read as a 0.
bit 1 All DACs and digital pins keep their respective output values. Exit with RESET.
IDLE Idle Mode Select. Setting this bit will freeze the CPU, Timer 0, 1, and 2, and the USARTs; other peripherals remain
bit 0 active. All DACs and digital pins keep their respective output values. This bit will always be read as a 0. Exit with AI
(A6h) and EWU (C6h) interrupts.The internal reference remains unchanged.