Datasheet

"#$%$&
SBAS203J − MARCH 2002 − REVISED JANUARY 2008
www.ti.com
27
RESET
The device can be reset from the following sources:
D Power-on reset
D External reset
D Software reset
D Watchdog timer reset
D Brownout reset
An external reset is accomplished by taking the RST pin
high for two t
OSC
periods, followed by taking the RST pin
low. A software reset is accomplished through the System
Reset register (SRTST, 0F7h). A watchdog timer reset is
enabled and controlled through Hardware Configuration
Register 0 (HCR0) and the Watchdog Timer register
(WDTCON, 0FFh). A brownout reset is enabled through
Hardware Configuration Register 1 (HCR1). External
reset, software reset, and watchdog timer reset complete
after 2
17
clock cycles. A brownout reset completes after 2
15
clock cycles.
All sources of reset cause the digital pins to be pulled high
from the initiation of the reset. For an external reset, taking
the RST pin high stops device operation, crystal
oscillation, and causes all digital pins to be pulled high from
that point. Taking the RST pin low initiates the reset
procedure.
A recommended external reset circuit is shown in
Figure 17. The serial 10kΩ resistor is recommended for
any external reset circuit configuration.
10k
Ω
13 RST
MSC1210
0.1
µ
F
1M
Ω
DV
DD
Figure 17. Typical Reset Circuit
POWER-ON RESET
The on-chip power-on reset (POR) circuitry releases the
device from reset at approximately DV
DD
= 2.0V. The POR
accommodates power-supply ramp rates as slow as
1V/10ms. To ensure proper operation, the power supply
should ramp monotonically. Note that as the device is
released from reset and program execution begins, the
device current consumption may increase, which may
result in a power-supply voltage drop. If the power supply
ramps at a slower rate, is not monotonic, or a brownout
condition occurs (where the supply does not drop below
the 2.0V threshold), then improper device operation may
occur. The on-chip brownout reset may provide benefit in
these conditions.
BROWNOUT RESET
The brownout reset (BOR) is enabled through Hardware
Configuration Register 1 (HCR1). If the conditions for
proper POR are not met or the device encounters a
brownout condition that does not generate a POR, the
BOR can be used to ensure proper device operation. The
BOR will hold the state of the device when the power
supply drops below the threshold level programmed in
HCR1, and then generate a reset when the supply rises
above the threshold level. Note that as the device is
released from reset, and program execution begins, the
device current consumption may increase, which may
result in a power-supply voltage drop, which may initiate
another brownout condition.
The BOR level should be chosen to match closely with the
application. For example, with a high external clock
frequency, the BOR level should match the minimum
operating voltage range for the device, or improper
operation may still occur.
Note that AV
DD
must rise above 2.0V for the Analog
Brownout Reset function to be disabled; otherwise, it will
be enabled and hold the device in reset.
The BOR voltage is not calibrated until the end of the reset
cycle; therefore, the actual BOR voltage will be
approxiamtely 25% higher than the selected voltage. This
can create a condition where the reset never ends (for
example, when selecting a 4.5V BOR voltage for a 5V
power supply).