Datasheet
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SBAS317E − APRIL 2004 − REVISED MAY 2006
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81
Extended Interrupt Priority (EIP)
7 6 5 4 3 2 1 0 Reset Value
SFR F8h 1 1 1 PWDI PX5 PX4 PX3 PX2 E0h
PWDI Watchdog Interrupt Priority. This bit controls the priority of the watchdog interrupt.
bit 4 0 = The watchdog interrupt is low priority.
1 = The watchdog interrupt is high priority.
PX5 External Interrupt 5 Priority. This bit controls the priority of external interrupt 5.
bit 3 0 = External interrupt 5 is low priority.
1 = External interrupt 5 is high priority.
PX4 External Interrupt 4 Priority. This bit controls the priority of external interrupt 4.
bit 2 0 = External interrupt 4 is low priority.
1 = External interrupt 4 is high priority.
PX3 External Interrupt 3 Priority. This bit controls the priority of external interrupt 3.
bit 1 0 = External interrupt 3 is low priority.
1 = External interrupt 3 is high priority.
PX2 External Interrupt 2 Priority. This bit controls the priority of external interrupt 2.
bit 0 0 = External interrupt 2 is low priority.
1 = External interrupt 2 is high priority.
Seconds Timer Interrupt (SECINT)
7 6 5 4 3 2 1 0 Reset Value
SFR F9h WRT SECINT6 SECINT5 SECINT4 SECINT3 SECINT2 SECINT1 SECINT0 7Fh
This system clock is divided by the value of the 16-bit register MSECH:MSECL. Then, that 1ms timer tick is divided by the
register HMSEC which provides the 100ms signal used by this seconds timer. Therefore, this seconds timer can generate
an interrupt which occurs from 100ms to 12.8 seconds. Reading this register will clear the Seconds Interrupt. This Interrupt
can be monitored in the AIE register.
WRT Write Control. Determines whether to write the value immediately or wait until the current count is finished.
bit 7 Read = 0.
0 = Delay Write Operation. The SEC value is loaded when the current count expires.
1 = Write Immediately. The counter is loaded once the CPU completes the write operation.
SECINT6−0 Seconds Count. Normal operation would use 100ms as the clock interval.
bits 6−0 Seconds Interrupt = (1 + SEC) • (HMSEC + 1) • (MSEC + 1) • t
CLK
.