Datasheet
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SBAS317E − APRIL 2004 − REVISED MAY 2006
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61
Port 3 (P3)
7 6 5 4 3 2 1 0 Reset Value
SFR B0h
P3.7 P3.6
SCK/SCL/CLKS
P3.5
T1
P3.4
T0
P3.3
INT1
P3.2
INT0
P3.1
TXD0
P3.0
RXD0
FFh
P3.7−0 General-Purpose I/O Port 3. This register functions as a general-purpose I/O port. In addition, all the pins have an
bits 7−0 alternative function listed below. Each of the functions is controlled by several other SFRs. The associated Port 3
latch bit must contain a logic ‘1’ before the pin can be used in its alternate function capacity.
SCK/SCL/CLKS Clock Source Select. Refer to PASEL (SFR F2h).
bit 6
T1 Timer/Counter 1 External Input. A 1 to 0 transition on this pin will increment Timer 1.
bit 5
T0 Timer/Counter 0 External Input. A 1 to 0 transition on this pin will increment Timer 0.
bit 4
INT1 External Interrupt 1. A falling edge/low level on this pin will cause an external interrupt 1 if enabled.
bit 3
INT0
External Interrupt 0. A falling edge/low level on this pin will cause an external interrupt 0 if enabled.
bit 2
TXD0 Serial Port 0 Transmit. This pin transmits the serial Port 0 data in serial port modes 1, 2, 3, and emits the
bit 1 synchronizing clock in serial port mode 0.
RXD0 Serial Port 0 Receive. This pin receives the serial Port 0 data in serial port modes 1, 2, 3, and is a bidirectional data
bit 0 transfer pin in serial port mode 0.