Datasheet

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SBAS317E APRIL 2004 − REVISED MAY 2006
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57
Auxiliary Interrupt Status (AISTAT)
7 6 5 4 3 2 1 0 Reset Value
SFR A7h SEC SUM ADC MSEC I2C CNT ALVD 0 00h
SEC Second System Timer Interrupt Status Flag (lowest priority AI).
bit 7 0: SEC interrupt cleared or masked.
1: SEC Interrupt active (it is cleared by reading SECINT, SFR F9h).
SUM Summation Register Interrupt Status Flag.
bit 6 0: SUM interrupt cleared or masked.
1: SUM interrupt active (it is cleared by reading the lowest byte of SUMR0, SFR E2h).
ADC ADC Interrupt Status Flag.
bit 5 0: ADC interrupt cleared or masked.
1: ADC interrupt active (it is cleared by reading the lowest byte of ADRESL, SFR D9h; if active, no new data will be
written to the ADC Results registers).
MSEC Millisecond System Timer Interrupt Status Flag.
bit 4 0: MSEC interrupt cleared or masked.
1: MSEC interrupt active (it is cleared by reading MSINT, SFR FAh).
I2C I
2
C Start/Stop Interrupt Status Flag.
bit 3 0: I
2
C start/stop interrupt cleared or masked.
1: I
2
C start/stop interrupt active (it is cleared by writing to I2CDATA, SFR 9Bh).
CNT CNT Interrupt Status Flag.
bit 2 0: CNT Interrupt cleared or masked.
1: CNT Interrupt active (it is cleared by reading from or writing to SPIDATA/I2CDATA, SFR 9Bh).
ALVD Analog Low Voltage Detect Interrupt Status Flag.
bit 1 0: ALVD Interrupt cleared or masked.
1: ALVD Interrupt active (cleared in hardware if AV
DD
exceeds ALVD threshold).
NOTE: If an interrupt is masked, the status can be read in AIPOL (SFR A4h).