Datasheet

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SBAS317E − APRIL 2004 − REVISED MAY 2006
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44
Table 7. Special Function Registers (continued)
ADDRESS RESET VALUEBIT 0BIT 1BIT 2BIT 3BIT 4BIT 5BIT 6BIT 7REGISTER
D7h ADMUX INP3 INP2 INP1 INP0 INN3 INN2 INN1 INN0 01h
D8h EICON 0 1 EAI AI WDTI 0 0 0 40h
D9h ADRESL
(1)
LSB
(1)
00h
DAh ADRESM
(1)
MSB
(1)
00h
DBh ADRESH
(1)
MSB
(1)
00h
DCh ADCON0 BOD EVREF VREFH EBUF PGA2 PGA1 PGA0 30h
DDh ADCON1 OF_UF POL SM1 SM0 — CAL2 CAL1 CAL0 00h
DEh ADCON2 DR7 DR6 DR5 DR4 DR3 DR2 DR1 DR0 1Bh
DFh ADCON3 0 0 0 0 0 DR10 DR9 DR8 06h
E0h ACC ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0 00h
E1h SSCON SSCON1 SSCON0 SCNT2 SCNT1 SCNT0 SHF2 SHF1 SHF0 00h
E2h SUMR0 LSB 00h
E3h SUMR1 00h
E4h SUMR2 00h
E5h SUMR3 MSB 00h
E6h ODAC 00h
E7h LVDCON ALVDIS 0 0 0 ALVD3 ALVD2 ALVD1 ALVD0 8Fh
E8h EIE 1 1 1 EWDI EX5 EX4 EX3 EX2 E0h
E9h HWPC0 0 0 0 0 0 0 DEVICE MEMORY 0000_00xxb
EAh HWPC1 0 0 1 0 0 0 0 0 20h
EBh HWVER
ECh
EDh
EEh FMCON 0 PGERA 0 FRCM 0 BUSY SPM FPM 02h
EFh FTCON FER3 FER2 FER1 FER0 FWR3 FWR2 FWR1 FWR0 A5h
F0h B 00h
F1h PDCON PDICLK PDIDAC PDI2C 0 PDADC PDWDT PDST PDSPI 6Fh
F2h PASEL PSEN4 PSEN3 PSEN2 PSEN1 PSEN0 0 0 0 00h
F3h
F4h PLLL PLL7 PLL6 PLL5 PLL4 PLL3 PLL2 PLL1 PLL0 xxh
(2)
F5h PLLH CKSTAT2 CKSTAT1 CKSTAT0 PLLLOCK 0 0 PLL9 PLL8 xxh
(2)
F6h ACLK 0 FREQ6 FREQ5 FREQ4 FREQ3 FREQ2 FREQ1 FREQ0 03h
F7h SRST 0 0 0 0 0 0 0 RSTREQ 00h
F8h EIP 1 1 1 PWDI PX5 PX4 PX3 PX2 E0h
F9h SECINT WRT SECINT6 SECINT5 SECINT4 SECINT3 SECINT2 SECINT1 SECINT0 7Fh
FAh MSINT WRT MSINT6 MSINT5 MSINT4 MSINT3 MSINT2 MSINT1 MSINT0 7Fh
FBh USEC 0 0 FREQ5 FREQ4 FREQ3 FREQ2 FREQ1 FREQ0 03h
FCh MSECL MSECL7 MSECL6 MSECL5 MSECL4 MSECL3 MSECL2 MSECL1 MSECL0 9Fh
FDh MSECH MSECH7 MSECH6 MSECH5 MSECH4 MSECH3 MSECH2 MSECH1 MSECH0 0Fh
FEh HMSEC HMSEC7 HMSEC6 HMSEC5 HMSEC4 HMSEC3 HMSEC2 HMSEC1 HMSEC0 63h
FFh WDTCON EWDT DWDT RWDT WDCNT4 WDCNT3 WDCNT2 WDCNT1 WDCNT0 00h
(1)
For the MSC1200/01, the ADC result is contained in ADRESH, ADRESM, and ADRESL. For the MSC1202, the ADC result is contained in
ADRESM and ADRESL (that is, shifted right one byte) and the MSB is sign-extended (Bipolar mode) or zero-padded (Unipolar mode) in
ADRESH. Therefore, when migrating between the MSC1200/01 and MSC1202, the ADC result calculation must be adjusted accordingly. For
all devices, the ADC interrupt is cleared by reading ADRESL.
(2)
Dependent on active clock mode.