Datasheet
#$
#$
#$$
SBAS317E − APRIL 2004 − REVISED MAY 2006
www.ti.com
41
Hardware Configuration Register 2 (HCR2)
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
CADDR 3Dh 0 0 0 0 0 CLKSEL2 CLKSEL1 CLKSEL0
NOTE: HCR2 is programmable only in SFPM, but can be read in UAM using the faddr_data_read Boot ROM routine.
CLKSEL2−1 Clock Select.
bits 2−0 000: Reserved
001: Reserved
010: Reserved
011: External Clock Mode
100: PLL High-Frequency (HF) Mode
101: PLL Low-Frequency (LF) Mode
110: Internal Oscillator High-Frequency (HF) Mode
111: Internal Oscillator Low-Frequency (LF) Mode
NOTE: Clock status can be verified reading PLLH in UAM.
Configuration Memory Programming
Hardware Configuration Memory can be changed only in Serial Flash Programming mode (SFPM).