Datasheet

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SBAS317E − APRIL 2004 − REVISED MAY 2006
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40
Hardware Configuration Register 1 (HCR1)
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
CADDR 3Eh DBSEL3 DBSEL2 DBSEL1 DBSEL0 1 DDB 1 1
NOTE: HCR1 is programmable only in SFPM, but can be read in UAM using the faddr_data_read Boot ROM routine.
DBSEL3−0 Digital Supply Brownout Level Select. The values listed are nominal. The actual value will vary depending on
device clock frequency and supply voltage. For high clock frequencies, the variation could be on the order of 10%
below the nominal value.
bits 7−4 0000: 4.6V
0001: 4.2V
0010: 3.8V
0011: 3.6V
0100: 3.3V
0101: 3.1V
0110: 2.9V
0111: 2.7V
1000: 2.6V
1001: Reserved
1010: Reserved
1011: Reserved
1100: Reserved
1101: Reserved
1110: Reserved
1111: Reserved
DDB Disable Digital Brownout Detection.
bit 2 0: Enable Digital Brownout Detection
1: Disable Digital Brownout Detection (default)