Datasheet

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SBAS317E − APRIL 2004 − REVISED MAY 2006
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30
SPI
The MSC120x implement a basic SPI interface that
includes the hardware for simple serial data transfers.
Figure 17 shows a block diagram of the SPI. The
peripheral supports master and slave modes, full duplex
data transfers, both clock polarities, both clock phases, bit
order, and slave select.
The timing diagram for supported SPI data transfers is
shown in Figure 18.
The I/O pins needed for data transfer are Data In (DIN),
Data Out (DOUT) and serial clock (SCK). The slave select
(SS
) pin can also be used to control the output of data on
DOUT.
The DIN pin is used for shifting data in for both master and
slave modes.
The DOUT pin is used for shifting data out for both master
and slave modes.
The SCK pin is used to synchronize the transfer of data for
both master and slave modes. SCK is always generated
by the master. The generation of SCK in master mode can
be done either in software (by simply toggling the port pin),
or by configuring the output on the SCK pin via PASEL
(SFR F2h). A list of the most common methods of
generating SCK follows, but the complete list of clock
sources can be found by referring to the PASEL SFR.
D Toggle SCK by setting and clearing the port pin.
D Memory Write Pulse (WR) that is idle high.
Whenever an external memory write command
(MOVX) is executed, a pulse is seen on P3.6. This
method can be used only if CPOL is set to ‘1’.
D Memory Write Pulse toggle version. In this mode,
SCK toggles whenever an external write command
(MOVX) is executed.
D T0_Out signal can be used as a clock. A pulse is
generated on SCK whenever Timer 0 expires. The
idle state of the signal is low, so this can be used
only if CPOL is cleared to ‘0’.
D T0_Out toggle. SCK toggles whenever Timer 0
expires.
D T1_Out signal can be used as a clock. A pulse is
generated whenever Timer 1 expires. The idle state
of the signal is low, so this can be used only if CPOL
is cleared to ‘0’.
D T1_Out toggle. SCK toggles whenever Timer 1
expires.
SPI /I
2
C
Data Write
SPICON
I2CCON
I
2
C
Stretch
Control
Counter
Start/Stop
Detect
SPI /I
2
C
Data Read
Pad Control
DOUT
P1.2
P1.4
P3.6
P1.3
Logic
DOUT
TX_CLK
RX_CLK
SS
SCK/SCL
CNT_CLK
CNT INT
I2C INT
DIN
CLKS
(refer to PASEL, SFR F2h)
SS
SCK
DIN
Figure 17. SPI/I
2
C Block Diagram