Datasheet
MPC506A, MPC507A
11
SBFS018A
www.ti.com
Direct
Multiplexer
Output
Buffered
OPA602
1/4 OPA404
MPC506A
Out
Out
In 1
In 2
In 3
In 16
A
0
A
1
A
2
A
3
18
28
A
0
A
1
A
2
A
3
MPC506A
18
28
18
28
8-Bit Channel
Address Generator
A
0
A
1
A
2
A
3
In 1
In 2
In 3
In 16
In 1
In 16
MPC506A
En
En
Out
En
+V
+V
+V
4LSBs 4MSBs
16 Analog Inputs (Ch241 to 256) 16 Analog Inputs (Ch1 to 16)
Settling Time to
0.01% is 20µs
with R
S
= 100Ω
Differential Multiplexer (MPC507A)
Single or multitiered configurations can be used to expand
multiplexer channel capacity up to 64 channels using a
64 x 1 or an 8 x 8 configuration.
Single-Node Expansion
The 64 x 1 configuration is simply eight (MPC507A) units
tied to a single node. Programming is accomplished with a
6-bit counter, using the 3LSBs of the counter to control
Channel Address inputs A
0
, A
1
, A
2
and the 3MSBs of the
counter to drive a 1-of-8 decoder. The 1-of-8 decoder then
is used to drive the ENABLE inputs (pin 18) of the MPC507A
multiplexers.
Two-Tier Expansion
Using an 8 x 8 two-tier structure for expansion to 64
channels, the programming is simplified. The 6-bit counter
output does not require a 1-of-8 decoder. The 3LSBs of the
counter drive the A
0
, A
1
and A
2
inputs of the eight first-tier
multiplexers and the 3MSBs of the counter are applied to the
A
0
, A
1
, and A
2
inputs of the second-tier multiplexer.
Single vs Multitiered Channel Expansion
In addition to reducing programming complexity, two-tier
configuration offers the added advantages over single-node
expansion of reduced OFF channel current leakage (reduced
OFFSET), better CMR, and a more reliable configuration if
a channel should fail ON in the single-node configuration,
data cannot be taken from any channel, whereas only one
channel group is failed (8 or 16) in the multitiered configu-
ration.
INSTALLATION AND
OPERATING INSTRUCTIONS
The ENABLE input, pin 18, is included for expansion of
the number of channels on a single node as illustrated in
Figure 5. With ENABLE line at a logic 1, the channel is
selected by the 3-bit (MPC507A or 4-bit MPC506A) Chan-
nel Select Address (shown in the Truth Tables). If ENABLE
is at logic 0, all channels are turned OFF, even if the Channel
Address Lines are active. If the ENABLE line is not to be
used, simply tie it to +V supply.
If the +15V and/or –15V supply voltage is absent or shorted
to ground, the MPC507A and MPC506A multiplexers will
not be damaged; however, some signal feedthrough to the
output will occur. Total package power dissipation must not
be exceeded.
For best settling speed, the input wiring and interconnec-
tions between multiplexer output and driven devices should
be kept as short as possible. When driving the digital inputs
from TTL, open collector output with pull up resistors are
recommended (see Typical Performance Curves, Access
Time).
To preserve common-mode rejection of the MPC507A, use
twisted-shielded pair wire for signal lines and inter-tier
connections and/or multiplexer output lines. This will help
common-mode capacitance balance and reduce stray signal
pickup. If shields are used, all shields should be connected
as close as possible to system analog common or to the
common-mode guard driver.
CHANNEL EXPANSION
Single-Ended Multiplexer (MPC506A)
Up to 64 channels (four multiplexers) can be connected to a
single node, or up to 256 channels using 17 MPC506A
multiplexers on a two-tiered structure as shown in Figures 5
and 6.
MPC506A
Group 4
49-64
16 Analog Inputs16 Analog Inputs
Out
Group 1
Group 4
Out
Enable
Enable
2
0
2
1
2
2
2
3
2
4
2
5
Settling time to 0.01% for R
S
100Ω
—Two MPC506A units in parallel 10µs
—Four MPC507A units in parallel 12
µ
s
Direct
Multiplexer
Output
Buffered
OPA602
1/4 OPA404
6-Bit
Binary
Counter
To
Group
2
To
Group
3
1 of 4
Decoder
In 1
In 2
In 3
In 16
A
3
A
2
A
1
A
0
18
28
A
3
A
2
A
1
A
0
MPC
506A
Group 1
Ch1-16
18
28
FIGURE 5. 64-Channel, Single-Tier Expansion.
FIGURE 6. Channel Expansion up to 256 Channels Using
16x16 Two-Tiered Expansion