Datasheet
MF10-N
SNOS547C –JUNE 1999–REVISED APRIL 2013
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System Block Diagram
Package in 20 pin molded wide body SOIC and 20 pin PDIP.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
Supply Voltage (V
+
− V
−
) 14V
V
+
+ 0.3V
Voltage at Any Pin
V
−
− 0.3V
Input Current at Any Pin
(3)
5 mA
Package Input Current
(3)
20 mA
Power Dissipation
(4)
500 mW
Storage Temperature 150°C
ESD Susceptability
(5)
2000V
Soldering Information N Package: 10 sec 260°C
Vapor Phase (60 Sec.) 215°C
SO Package
Infrared (15 Sec.) 220°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its specified operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) When the input voltage (V
IN
) at any pin exceeds the power supply rails (V
IN
< V
−
or V
IN
> V
+
) the absolute value of current at that pin
should be limited to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply
boundaries with a 5 mA current limit to four.
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by T
JMAX
, θ
JA
, and the ambient temperature,
T
A
. The maximum allowable power dissipation at any temperature is P
D
= (T
JMAX
− T
A
)/θ
JA
or the number given in the Absolute
Maximum Ratings, whichever is lower. For this device, T
JMAX
= 125°C, and the typical junction-to-ambient thermal resistance of the
MF10ACN/CCN when board mounted is 55°C/W. For the MF10AJ/CCJ, this number increases to 95°C/W and for the
MF10ACWM/CCWM this number is 66°C/W.
(5) Human body model, 100 pF discharged through a 1.5 kΩ resistor.
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