Datasheet
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50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
0 V
3 V
Output
Input
RS-232
Output
SR(tr) =
1.5 V 1.5 V
3 V
–3 V
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: Z
O
= 50 Ω, 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
C
L
(see Note A)
Generator
(see Note B)
3 V
–3 V
t
THL(D)
or t
TLH(D)
6 V
t
THL(D)
t
TLH(D)
R
L
5-V
SHDN
V
OH
V
OL
TEST CIRCUIT VOLTAGE WAVEFORMS
0 V
3 V
Output
Input
50%
50%
1.5 V 1.5 V
50 Ω
RS-232
Output
Generator
(see Note B)
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: Z
O
= 50 Ω, 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
C
L
(see Note A)
t
PLH(D)
R
L
5-V
SHDN
V
OH
V
OL
t
PHL(D)
TEST CIRCUIT VOLTAGE WAVEFORMS
50 Ω
–3 V
1.5 V
Output
Input
Output
5-V
EN 50% 50%
3 V
1.5 V
Generator
(see Note B)
C
L
(see Note A)
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: Z
O
= 50 Ω, 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
5-V
SHDN
t
PHL(R)
t
PLH(R)
V
OH
V
OL
MAX213
5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ± 15-kV ESD PROTECTION
SLLS680 – DECEMBER 2005
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 2. Driver Slew Rate
Figure 3. Driver Pulse Skew and Propagation Delay Times
Figure 4. Receiver Propagation Delay Times
8