Datasheet


    
 ±  
SLLS567E − MAY 2003 − REVISED JANUARY 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
DIN1
DOUT1
RIN2ROUT2
DIN2
DOUT2
RIN3ROUT3
7
6
5
26
2
3
4
27
RIN1ROUT1
89
DIN3
DOUT3
DIN4
DOUT4
1
28
RS-232
Outputs
TTL/CMOS
Inputs
RS-232
Inputs
TTL/CMOS
Outputs
21
20
SHDN
25
RIN4ROUT4
RIN5ROUT5
22
19
23
18
EN
24