Datasheet
LPC660
www.ti.com
SNOS554D –MAY 1998–REVISED MARCH 2013
Figure 45. High Gain Amplifier with Offset Voltage Reduction
Gain = −46.8
Output offset voltage reduced to the level of the input offset voltage of the bottom amplifier (typically 1 mV), referred
to V
BIAS
.
Connection Diagram
Top View
Figure 46. 14-Pin SOIC Package
See Package Number D0014A
Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LPC660