Datasheet

7.4.5. Phase Shift LED Outputs
The Phase Shift PWM scheme delays the time when each LED driver becomes active as shown in the
PS_MODE diagram of the datasheet. Set the PS_MODE bits in the CFG5 to the desired setting. A 111b
value selects no phase shift for six drivers.
7.4.6. Curve Shaping and Brightness Change Control
Large changes in brightness can be smoothed and controlled using the features of the LP8556. The CFG3
register is used to enable S curve transitions in brightness which are more pleasing to the eye. Additionally
the PWM_SLOPE needs to be set to determine the S curve shape. The PWM_SLOPE allows the transition
between brightness levels to be slowed. The FILTER bits can be used to alter the transition even more.
The FILTER bits add RC delay to slow the curve shape.
The PWM_INPUT_HYSTERESIS setting is used to alter how the output PWM reacts to the input. A larger
hysteresis value (lower bit resolution) will make the output less sensitive to very small changes in the PWM
input. This can be used if the PWM input signal is not stable, noisy, or less sensitivity is desired.
The recommended setting for the CFG3 register is 00h until the target application is prototyped and
brightness settings are applied.
7.4.7. PWM Output Dithering
The Dithering scheme can be used during brightness changes and during steady state conditions. The
STEADY_DITHER bit in CFG4 can be set to one to dither all of the time or reset to zero to only dither
during brightness changes. The DITHER bits in CFG4 control how much to dither or reset to 00b to
disable dithering.
7.5. Safety Feature settings
7.5.1. Thermal Shutdown
The LP8556 will shut down the LED outputs and the boost if the temperature exceeds 150 degrees C. The
TSD bit will be set in the Status register and will clear upon a read. The device will exit thermal shutdown
when the temperature drops below 130 C.
7.5.2. Under Voltage Lock Out
The bits UVLO_EN and UVLO_TH in the CFG2 register control whether UVLO is enabled and what the
threshold is set at. A fault occurring when enabled will set the flag in the Status Register at 02h. The fault
is cleared by setting UVLO_EN to zero or by reading the fault register.
7.5.3. LED Fault Detection
An open or short circuit can be detected on the LED driver outputs when in automatic PWM and current
dimming mode. The comparators for adjusting headroom are used to detect an open or a short. The
LED_FAULT_TH bits in CFGE sets the high comparator threshold for detecting a short.
7.6. ID Register
The CFGF register is used to store panel information and can identify the stored EPROM configuration. This
register can be set to the fields shown in the datasheet or any 8 bits as desired.