Datasheet

LP5996
www.ti.com SNVS415C –NOVEMBER 2006–REVISED MAY 2013
APPLICATION HINTS
OPERATION DESCRIPTION
The LP5996 is a low quiescent current, power management IC, designed specifically for portable applications
requiring minimum board space and smallest components. The LP5996 contains two independently selectable
LDOs. The first is capable of sourcing 150mA at outputs between 0.8V and 3.3V. The second can source 300mA
at an output voltage of 0.8V to 3.3V.
INPUT CAPACITOR
An input capacitor is required for stability. It is recommended that a 1.0µF capacitor be connected between the
LP5996 input pin and ground (this capacitance value may be increased without limit).
This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean
analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.
Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low-
impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input,
it must be ensured by the manufacturer to have a surge current rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and
temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain
approximately 1.0µF over the entire operating temperature range.
OUTPUT CAPACITOR
The LP5996 is designed specifically to work with very small ceramic output capacitors. A 1.0µF ceramic
capacitor (temperature types Z5U, Y5V or X7R) with ESR between 5mΩ to 500mΩ, is suitable in the LP5996
application circuit.
For this device the output capacitor should be connected between the V
OUT
pin and ground.
It is also possible to use tantalum or film capacitors at the device output, C
OUT
(or V
OUT
), but these are not as
attractive for reasons of size and cost (see the section Capacitor Characteristics).
The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR
value that is within the range 5mΩ to 500mΩ for stability.
NO-LOAD STABILITY
The LP5996 will remain stable and in regulation with no external load. This is an important consideration in some
circuits, for example CMOS RAM keep-alive applications.
CAPACITOR CHARACTERISTICS
The LP5996 is designed to work with ceramic capacitors on the output to take advantage of the benefits they
offer. For capacitance values in the range of 0.47µF to 4.7µF, ceramic capacitors are the smallest, least
expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The
ESR of a typical 1.0µF ceramic capacitor is in the range of 20mΩ to 40mΩ, which easily meets the ESR
requirement for stability for the LP5996.
For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure
correct device operation. The capacitor value can change greatly, depending on the operating conditions and
capacitor type.
In particular, the output capacitor selection should take account of all the capacitor parameters, to ensure that the
specification is met within the application. The capacitance can vary with DC bias conditions as well as
temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging.
The capacitor parameters are also dependant on the particular case size, with smaller sizes giving poorer
performance figures in general. As an example, Figure 20 shows a typical graph comparing different capacitor
case sizes in a Capacitance vs. DC Bias plot. As shown in the graph, increasing the DC Bias condition can result
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