Datasheet

LP5951
SNVS345F –JUNE 2006–REVISED MAY 2013 www.ti.com
NO-LOAD STABILITY
The LP5951 will remain stable and in regulation with no external load. This is an important consideration in some
circuits, for example CMOS RAM keep-alive applications.
ENABLE OPERATION
The LP5951 may be switched ON or OFF by a logic input at the Enable pin, V
EN
. A logic high at this pin will turn
the device on. When the enable pin is low, the regulator output is off and the device typically consumes 5nA.
If the application does not require the Enable switching feature, the V
EN
pin should be tied to V
IN
to keep the
regulator output permanently on.
To ensure proper operation, the signal source used to drive the V
EN
input must be able to swing above and
below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under Enable
Control Characteristics, V
IL
and V
IH
.
FAST TURN OFF AND ON
The controlled switch-off feature of the device provides a fast turn off by discharging the output capacitor via an
internal FET device. This discharge is current limited by the RDSon of this switch.
Fast turn-on is ensured by an optimized architecture allowing a very fast ramp of the output voltage to reach the
target voltage.
SHORT-CIRCUIT PROTECTION
The LP5951 is short circuit protected and in the event of a peak over-current condition, the output current
through the PMOS will be limited.
If the over-current condition exists for a longer time, the average power dissipation will increase depending on
the input to output voltage difference until the thermal shutdown circuitry will turn off the PMOS.
Please refer to the Thermal Properties section for power dissipation calculations.
THERMAL-OVERLOAD PROTECTION
Thermal-Overload Protection limits the total power dissipation in the LP5951. When the junction temperature
exceeds T
J
= 160°C typ., the shutdown logic is triggered and the PMOS is turned off, allowing the device to cool
down. After the junction temperature dropped by 20°C (temperature hysteresis), the PMOS is activated again.
This results in a pulsed output voltage during continuous thermal-overload conditions.
The Thermal-Overload Protection is designed to protect the LP5951 in the event of a fault condition. For normal,
continuous operation, do not exceed the absolute maximum junction temperature rating of T
J
= +150°C (see
Absolute Maximum Ratings).
REVERSE CURRENT PATH
The internal PFET pass device in LP5951 has an inherent parasitic body diode. During normal operation, the
input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output is
pulled above the input in an application, then current flows from the output to the input as the parasitic diode gets
forward biased. The output can be pulled above the input as long as the current in the parasitic diode is limited to
50mA.
For currents above this limit an external Schottky diode must be connected from V
OUT
to V
IN
(cathode on V
IN
,
anode on V
OUT
).
EVALUATION BOARDS
For availability of evaluation boards, see the LP5951 product folder. For information regarding evaluation boards,
see the TI AN-1486 Application Report (SNVA169).
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