Datasheet

LP5907
www.ti.com SNVS798G –APRIL 2012 – REVISED OCTOBER 2013
Capacitor Characteristics
The LP5907 is designed to work with ceramic capacitors on the input and output to take advantage of the
benefits they offer. For capacitance values in the range of 1 µF to 10 µF, ceramic capacitors are the smallest,
least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise.
The ESR of a typical 1-µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR
requirement for stability for the LP5907.
The temperature performance of ceramic capacitors varies by type and manufacturer. Most large value ceramic
capacitors (≥ 2.2 µF) are manufactured with Z5U or Y5V temperature characteristics, which results in the
capacitance dropping by more than 50% as the temperature goes from 25°C to 85°C.
A better choice for temperature coefficient in a ceramic capacitor is X7R. This type of capacitor is the most stable
and holds the capacitance within ±15% over the temperature range. Tantalum capacitors are less desirable than
ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance
and voltage ratings in the 1 µF to 10 µF range.
Another important consideration is that tantalum capacitors have higher ESR values than equivalent size
ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the
stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic
capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about
2:1 as the temperature goes from 25°C down to –40°C, so some guard band must be allowed.
Remote Capacitor Operation
The LP5907 requires at least a 1-µF capacitor at output pin, but there is no strict requirements about the location
of the capacitor in regards the LDO output pin. In practical designs the output capacitor may be located some 5-
10 cm away from the LDO. This means that there is no need to have a special capacitor close to the output pin if
there is already respective capacitors in the system (like a capacitor at the input of supplied part). The remote
capacitor feature helps user to minimize the number of capacitors in the system.
As a good design practice, it is good to keep the wiring parasitic inductance at a minimum, which means to use
as wide as possible traces from the LDO output to the capacitors, keeping the LDO trace layer as close as
possible to ground layer and avoiding vias on the path. If there is a need to use vias, implement as many as
possible vias between the connection layers. The recommendation is to keep parasitic wiring inductance less
than 35 nH. For the applications with fast load transients, it is recommended to use an input capacitor equal to or
larger to the sum of the capacitance at the output node for the best load transient performance.
No-Load Stability
The LP5907 will remain stable and in regulation with no external load.
Enable Control
The LP5907 may be switched ON or OFF by a logic input at the ENABLE pin. A high voltage at this pin will turn
the device on. When the enable pin is low, the regulator output is off and the device typically consumes 3 nA.
However if the application does not require the shutdown feature, the V
EN
pin can be tied to V
IN
to keep the
regulator output permanently on.
A 1-MΩ pulldown resistor ties the V
EN
input to ground, this ensures that the device will remain off when the
enable pin is left open circuit. To ensure proper operation, the signal source used to drive the V
EN
input must be
able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics
under V
IL
and V
IH
.
DSBGA Mounting
The DSBGA package requires specific mounting techniques, which are detailed in Texas Instruments Application
Note AN-1112, SNVA009.
For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the
DSBGA device.
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