Datasheet

V
IN
V
EN
GND
V
OUT
OUTPUT
1 PF
1.0 PF
INPUT
ENABLE
GND
LP5907
Hardware www.ti.com
4 Hardware
The schematic and layout of the evaluation board are given below:
Figure 1. Evaluation Board Schematic
5 PCB Layout
Figure 2. LP5907 Evaluation Board with Components (Top)
Figure 3. LP5907 Evaluation Board (Bottom)
2
AN-2244 LP5907 DSBGA Evaluation Board Information SNVA634A–March 2012–Revised April 2013
Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated