Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positive, fixed VSSOP 8

LP3997

Enable

DELAY

OUT

Error/POR

SENSE

OUT

BYP

ERROR

2.2 PF

470k

GND

0.1 PF

LP3997

www.ti.com

SNVS272B –MAY 2004–REVISED MAY 2013

Micropower 250-mA CMOS LDO Regulator With Error Flag and Power-On-Reset

Check for Samples: LP3997

FEATURES

DESCRIPTION

The LP3997 regulator is designed to meet the

• Low 140-mV Dropout at 250-mA Load

requirements of portable, battery-powered systems,

• Stable With Ceramic Capacitor.

providing accurate output voltage, low noise, and low

• Low Noise With Bypass Capacitor

quiescent current. The LP3997 provides 3.3V output

at up to 250mA load current. The chip architecture is

• Less Than 80 µA Typical I

at 250 mA

capable of providing output voltages as low as 0.8V.

• Virtually Zero I

(Disabled)

When switched in shutdown mode, the power

• Thermal and Short Circuit Protection

consumption is virtually zero.

• 3.3-V Output

(1)

The LP3997 is designed to be stable with space

• 8-Lead VSSOP Package

(2)

saving ceramic output capacitor as small as 1µF.

The LP3997 also includes an out-of-regulation error

APPLICATIONS

flag. When the output is more than 5% below its

• Portable Consumer Electronics

nominal voltage, the error flag sets to low. If a

capacitor is connected to device’s delay pin, a

• Cellular Handsets

delayed power-on reset signal will be generated.

• Laptop and Palm Computers

• PDAs

• Digital Cameras

(1) For other voltage options, contact your TI sales office

(2) For other package options, contact your TI sales office.

Typical Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (17 pages)

PAGE 1
LP3997 www.ti.com SNVS272B – MAY 2004 – REVISED MAY 2013 Micropower 250-mA CMOS LDO Regulator With Error Flag and Power-On-Reset Check for Samples: LP3997 FEATURES DESCRIPTION • • • • • • • • The LP3997 regulator is designed to meet the requirements of portable, battery-powered systems, providing accurate output voltage, low noise, and low quiescent current. The LP3997 provides 3.3V output at up to 250mA load current. The chip architecture is capable of providing output voltages as low as 0.8V.
PAGE 2
LP3997 SNVS272B – MAY 2004 – REVISED MAY 2013 www.ti.com Functional Block Diagram VIN VOUT + SENSE ON OFF SD RFB2 POR 2.2 PA 0.5V ERROR 6 M: RFB1 VREF 1.2V + - GND CBYP DELAY Pin Descriptions Pin No. Name Description 1 CBYP Noise bypass pin. For low noise applications a 0.1µF or larger ceramic capacitor should be connected from this pin to ground. This will also improve PSSR.
PAGE 3
LP3997 www.ti.com SNVS272B – MAY 2004 – REVISED MAY 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Input Voltage -0.3 to 6.5V Output Voltage -0.3 to (VIN + 0.3V) with 6.5V (max) SD Input Voltage -0.3 to (VIN + 0.3V) with 6.5V (max) Junction Temperature 150°C Lead/Pad Temp.
PAGE 4
LP3997 SNVS272B – MAY 2004 – REVISED MAY 2013 www.ti.com Electrical Characteristics Unless otherwise noted, SD = 950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CBYP = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27°C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125°C.
PAGE 5
LP3997 www.ti.com SNVS272B – MAY 2004 – REVISED MAY 2013 Electrical Characteristics (continued) Unless otherwise noted, SD = 950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CBYP = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27°C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125°C.
PAGE 6
LP3997 SNVS272B – MAY 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics. Unless otherwise noted, SD = 950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CBYP = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27°C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125°C. Output Voltage Change vs Temperature Ground Current vs Load Current 100 3.00 90 GROUND CURRENT (PA) VOUT CHANGE (%) 2.
PAGE 7
LP3997 www.ti.com SNVS272B – MAY 2004 – REVISED MAY 2013 Typical Performance Characteristics. (continued) Unless otherwise noted, SD = 950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CBYP = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27°C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125°C. VIN (V) 4.9 4.3 'VOUT 'VOUT (20 mV/DIV) Line Transient CIN = COUT = 2.2 PF CBYP = 0 IL = 1 to 250 mA 4.9 4.
PAGE 8
LP3997 SNVS272B – MAY 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics. (continued) Unless otherwise noted, SD = 950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CBYP = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27°C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125°C. Power Supply Rejection Ratio 0 CBYP = 0.
PAGE 9
LP3997 www.ti.com SNVS272B – MAY 2004 – REVISED MAY 2013 Applications Information External Capacitors In common with most regulators, the LP3997 requires the inclusion of external capacitors. VIN An input capacitor is required for stability. It is recommended that a minimum of 1.0µF capacitor is connected between the LP3997 input pin and ground (this capacitance value may be increased without limit).
PAGE 10
LP3997 SNVS272B – MAY 2004 – REVISED MAY 2013 www.ti.com CBYP For low noise application, connect a high frequency ceramic capacitor from CBYP to ground, A 0.01µF to 0.1µF X5R or X7R is recommended. This capacitor is connected directly to high impedance node in the band gap reference circuit. Any significant loading on this node will cause a change in the regulated output voltage. For this reason, DC leakage current from this pin must be kept as low as possible for best output voltage accuracy.
PAGE 11
LP3997 www.ti.com SNVS272B – MAY 2004 – REVISED MAY 2013 Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly ) than a ceramic capacitor with the same ESR value.
PAGE 12
LP3997 SNVS272B – MAY 2004 – REVISED MAY 2013 www.ti.com REVISION HISTORY Changes from Revision A (May 2013) to Revision B • 12 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 13
PACKAGE OPTION ADDENDUM www.ti.com 7-Oct-2013 PACKAGING INFORMATION Orderable Device Status (1) LP3997MM-3.3/NOPB ACTIVE Package Type Package Pins Package Drawing Qty VSSOP DGK 8 1000 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Device Marking (3) CU SN Level-1-260C-UNLIM (4/5) -40 to 125 SAKB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
PAGE 14
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LP3997MM-3.3/NOPB Package Package Pins Type Drawing VSSOP DGK 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 178.0 12.4 Pack Materials-Page 1 5.3 B0 (mm) K0 (mm) P1 (mm) 3.4 1.4 8.0 W Pin1 (mm) Quadrant 12.
PAGE 15
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3997MM-3.3/NOPB VSSOP DGK 8 1000 210.0 185.0 35.
PAGE 16
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