Datasheet

LP3972
SNVS468K –SEPTEMBER 2006–REVISED MAY 2013 www.ti.com
8. The Applications processor asserts PWR_EN, the LP3972 enables the low-voltage regulators.
9. Countdown timer expires; If enabled power domains are OK (I
2
C read) the power up sequence continues by
enabling the processors 13 MHz oscillator and PLL’s.
10. The Applications processor begins the execution of code.
APPLICATION HINTS
LDO CONSIDERATIONS
External Capacitors
The LP3972’s regulators require external capacitors for regulator stability. These are specifically designed for
portable applications requiring minimum board space and smallest components. These capacitors must be
correctly selected for good performance.
Input Capacitor
An input capacitor is required for stability. It is recommended that a 1.0 µF capacitor be connected between the
LDO input pin and ground (this capacitance value may be increased without limit).
This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean
analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.
Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low
impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input,
it must be ensured by the manufacturer to have a surge current rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and
temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain
approximately 1.0 µF over the entire operating temperature range.
Output Capacitor
The LDOs are designed specifically to work with very small ceramic output capacitors. A 1.0 µF ceramic
capacitor (temperature types Z5U, Y5V or X7R) with ESR between 5 mΩ to 500 mΩ, are suitable in the
application circuit.
For this device the output capacitor should be connected between the V
OUT
pin and ground.
It is also possible to use tantalum or film capacitors at the device output, C
OUT
(or V
OUT
), but these are not as
attractive for reasons of size and cost (see the section Capacitor Characteristics).
The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR
value that is within the range 5 mΩ to 500 mΩ for stability.
No-Load Stability
The LDOs will remain stable and in regulation with no external load. This is an important consideration in some
circuits, for example CMOS RAM keep-alive applications.
Capacitor Characteristics
The LDOs are designed to work with ceramic capacitors on the output to take advantage of the benefits they
offer. For capacitance values in the range of 0.47 µF to 4.7 µF, ceramic capacitors are the smallest, least
expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The
ESR of a typical 1.0 µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR
requirement for stability for the LDOs.
For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure
correct device operation. The capacitor value can change greatly, depending on the operating conditions and
capacitor type. In particular, the output capacitor selection should take account of all the capacitor parameters, to
ensure that the specification is met within the application. The capacitance can vary with DC bias conditions as
well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to
aging. The capacitor parameters are also dependant on the particular case size, with smaller sizes giving poorer
44 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LP3972