Datasheet

LP3972
www.ti.com SNVS468K –SEPTEMBER 2006–REVISED MAY 2013
V
CC
_COMM TARGET VOLTAGE 1 DUMMY REGISTER (CDTV1)
V
CC
_COMM Target Voltage 1 Dummy Register (CDTV1) 8h’26 Write Only
(1)
Bit 7 6 5 4 3 2 1 0
Designation Reserved Output Voltage
Reset Value 0 0 0 0 0 0 0 0
(1) CDTV1 must be writable by an I
2
C controller. This is a dummy register
V
CC
_COMM TARGET VOLTAGE 2 DUMMY REGISTER (CDTV2)
V
CC
_COMM Target Voltage 2 Dummy Register (CDTV2) 8h’27 Write Only
(1)
Bit 7 6 5 4 3 2 1 0
Designation Reserved Output Voltage
Reset Value 0 0 0 0 0 0 0 0
(1) CDTV2 must be writable by an I
2
C controller. This is a dummy register and cannot be read.
This is a variable voltage supply to the internal SRAM of the Application processor.
LDO5 (V
CC
_SRAM) TARGET VOLTAGE 1 REGISTER
LDO5 (V
CC
_SRAM) Target Voltage 1 Register (SDTV1) 8H'29
Bit 7 6 5 4
(1)
3
(1)
2
(1)
1*
(1)
0
(1)
Designation Reserved LDO 5 Output Voltage (L5OV)
Reset Value 0 0 0 0 1 0 1 1
(1) One-time factory programmable EPROM registers for default values
LDO5 (V
CC
_SRAM) Target Voltage 1 Register (SDTV1) 8h’29 Definitions
Bit Access Name Description
7:5 — — Reserved
4:0 R/W B1OV Data Code Output Voltage Data Code Output Voltage
5h’0 — 5h’10 1.125
5h’1 — 5h’11 1.150
5h’2 — 5h’12 1.175
5h’3 — 5h’13 1.200
5h’4 — 5h’14 1.225
5h’5 0.850 5h’15 1.250
5h’6 0.875 5h’16 1.275
5h’7 0.900 5h’17 1.300
5h’8 0.925 5h’18 1.325
5h’9 0.950 5h’19 1.350
5h’A 0.975 5h’1A 1.375
5h’B 1.000 5h’1B 1.400
5h’C 1.025 5h’1C 1.425
5h’D 1.050 5h’1D 1.450
5h’E 1.075 5h’1E 1.475
5h’F 1.100 5h’1F 1.500
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