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User's Guide

SNVA233A–September 2007–Revised April 2013

AN-1619 Evaluation Kit for LP3907 — Programmable

Power Management Unit with 1

C Compatible Interface

1 LP3907 Overview

The LP3907 is a multi-function, programmable Power Management Unit, optimized for low power FPGAs,

microprocessors and DSPs. This device integrates two highly efficient 1A/600mA step-down DC/DC

converters with dynamic voltage management (DVM), two 300mA Linear Regulators and a 400kHz I

compatible interface to allow a host controller access to the internal control registers of the LP3907. The

LP3907 additionally features programmable power-on sequencing and a tiny 4 x 4 x 0.8mm WQFN 24–pin

package.

2 Evaluation Kit Overview

The LP3907 Evaluation Kit is based on a modular system, where the actual evaluation board is connected

to the PC via a USB – I2C interface board.

The kit supports complete functional evaluation of the LP3907 circuit. The evaluation kit consists of:

• LP3907 evaluation board with USB interface

• USB Interface cable

• Evaluation software for PC

• LP3907 datasheet

• Evaluation Manual (this document)

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SNVA233A–September 2007–Revised April 2013 AN-1619 Evaluation Kit for LP3907 — Programmable Power Management

Unit with 1

C Compatible Interface

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Summary of content (17 pages)

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User's Guide SNVA233A – September 2007 – Revised April 2013 AN-1619 Evaluation Kit for LP3907 — Programmable Power Management Unit with 12C Compatible Interface 1 LP3907 Overview The LP3907 is a multi-function, programmable Power Management Unit, optimized for low power FPGAs, microprocessors and DSPs.
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Evaluation Kit Setup www.ti.com Figure 1. LP3907 Evaluation Board with Intergrated USB Interface 3 Evaluation Kit Setup Please use ESD protection to prevent any unwanted damaging ESD events! The LP3907 Evaluation Board should contain a USB interface to the left, as shown in Figure 2. Connect this setup to the USB port of a PC using the included USB cable. When the USB board is plugged in for the first time, the operating system prompts for “New hardware found” and installs the USB driver.
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Getting Started www.ti.com SDA, SCL, and ADC jumpers USB Interface Reset USBPower Jumper GND Plane Connection Figure 2. USB Interface Settings 5 Getting Started Because of internal pullups, the LP3907 should become active as soon as the USB cable is plugged in. To avoid damaging any parts, be sure to read the section describing how to power the board on Powering the LP3907 Board. For a quick start, make sure to short (connect) all jumpers except for JP8 & JP7 on the LP3907 Evaluation board.
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Getting Started www.ti.com 4 pin USB programming interface JP8 and JP7 Figure 3. Starting Jumper Settings Figure 4.
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Using the Evaluation Software www.ti.com 6 Using the Evaluation Software 6.1 Register Interface (Direct Write and Read) A register control established through an I2C compatible serial interface allows the user to directly program the registers by writing to and reading from the memory map registers. This provides the user with added flexibility in controlling the different functions of the LP3907.
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Using the Evaluation Software www.ti.com Figure 6. Chip Control Interface 6.3 Regulator Output Voltage Selection The output voltages of all the LDO and buck converters can be programmed through I2C control registers by simply moving the slider. The buck regulators have two sliders and a Hold/Ramp button to control its output voltage. This prevents the user from scaling the bucks to the second voltage if the Hold/Ramp button is not depressed.
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Using the Evaluation Software www.ti.com The USB interface also contains ADCs to measure the output voltage of the regulators. To do so, simply connect the USB interface ADC jumpers shown in Figure 8. To measure the external voltages again, simply click the “Measure” button on the GUI. Figure 7. Regulator Output Voltage Selection Interface USB interface ADC jumpers Figure 8.
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Using the Evaluation Hardware 6.4 www.ti.com Buck and EN_T Control The Control/Status Bits Control menu controls the following aspects of the chip: 1. Temp – Reflects the status of the regulators. If a buck or LDO regulator falls out of regulation because of the temperature, it will be shown in that panel. 2. System Delay Sequence – Allows for the user to program a preset delay sequence for the startup of the chip. 3.
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Using the Evaluation Hardware www.ti.com IC. USB Interface Reset USBPower Jumper GND plane connection Figure 10. USB Interface Settings 7.2 Enable Configurations Through the 20 Pin Header The following diagram shows how to enable or disable different regulators by jumpering pins in the 20 pin header. One practical use of grounding the enable pins of the regulators is to signal a System Delay Sequence (EN_T).
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Using the Evaluation Hardware www.ti.com Figure 12. Jumper Settings to Disable All Regulators and EN_T 7.3 LP3907 Hardware Block Description The evaluation board is fully populated with the LP3907. The LP3907 Evaluation board is designed to allow the user to test each function independently as well as in the system. Jumpers 1-6 as described in the Jumper table allow the VDD and GND path of each of the blocks to be separated from the rest of the blocks.
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Using the Evaluation Hardware www.ti.com Buck 1 External Control Network Buck 2 External Control Network USBPower Jumper Figure 13. Buck Regulator Feedback Network Table 1.
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Using the Evaluation Hardware www.ti.com Table 1. Jumper Settings (continued) *ADC These jumpers connect outputs of various regulators to the ADCs of the USB. Needs to be jumpered to measure the voltages of different regulators from the GUI. ENLDO2 ENLDO1 LDO2 LDO1 0.47 PF-25V-X7R-S 0.
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Gerber Files www.ti.com 8 Gerber Files The LP3907 is a four-layer board. Below are the Gerber files for the board. The accompanying CD has the Gerber files in Cadence allegro format.
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Gerber Files 14 www.ti.
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PCB Layout Considerations www.ti.com 9 PCB Layout Considerations The evaluation board layers from top to bottom are: 1. Top, component side 2. Ground plane 3. Mid signal section 4. Bottom, solder side For good performance of the circuit, it is essential to place the input and output capacitors very close to the circuit and use wide routing for the traces allowing high currents. Sensitive components should be placed far from those components with high pulsating current.
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List of Main Components for LP3907 Evaluation Board (not including USB interface) 10 List of Main Components for LP3907 Evaluation Board (not including USB interface) Reference Designator Value, Size, Tolerance Description Vendor C6,C7,C10 1uF, 16V, X7R, 08051 C2012X7R1C105K TDK C1–C5 10uF, 16V, X7R 01206 C3216X7R1C106M TDK C8,C9 0.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.