Datasheet

EN_T
Vout Buck1
Vout Buck2
Vout LDO1
Vout LDO2
t
2
t
3
t
4
t
1
I
2
C
EN_T
Ext Enable
Pins
Regulator ON
LP3906
SNVS456M –AUGUST 2006–REVISED MAY 2013 www.ti.com
NOTE
LP3906 The default Power on delays can be reprogrammed at final test or by using I
2
C
registers to 1, 1.5, 2, 3, 6, or 11 ms.
The regulators can also be programmed through I
2
C to turn on and off. By default, the I
2
C enables for the
regulators are ON.
The regulators are on following the pattern below:
Regulators on = (I
2
C enable) AND (External pin enable OR EN_T high).
NOTE
The EN_T power-up sequencing may also be employed immediately after V
IN
is applied to
the device. However, V
IN
must be stable for approximately 8ms minimum before EN_T be
asserted high to ensure internal bias, reference, and the Flexible POR timing are
stabilized. This initial EN_T delay is necessary only upon first time device power-on for
power sequencing function to operate properly.
LP3906 Default Power-Up Sequence
Table 4. Power-On Timing Specification
Symbol Description Min Typ Max Units
t
1
Programmable Delay from EN_T assertion to V
CC
_Buck1 On 1.5 ms
t
2
Programmable Delay from EN_T assertion to V
CC
_Buck2 On 2 ms
t
3
Programmable Delay from EN_T assertion to V
CC
_LDO1 On 3 ms
t
4
Programmable Delay from EN_T assertion to V
CC
_LDO2 On 6 ms
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