Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positive, fixed TO 263 5

BIAS

GND

OUT

BIAS

10 PF Ceramic

OUT

10 PF

Ceramic

BIAS

1 PF

GND

LP38858-x.x

LP38858

www.ti.com

SNVS462D –OCTOBER 2006–REVISED APRIL 2013

1.5A Fast-Response High-Accuracy LDO Linear Regulator with Soft-Start

Check for Samples: LP38858

FEATURES

DESCRIPTION

The LP38858 is a high current, fast response

• Standard V

OUT

Values of 0.8V and 1.2V

regulator which can maintain output voltage

• Wide V

BIAS

Supply Operating Range of 3.0V to

regulation with extremely low input to output voltage

5.5V

drop. Fabricated on a CMOS process, the device

• Stable with 10µF Ceramic Capacitors

operates from two input voltages: V

BIAS

provides

voltage to drive the gate of the N-MOS power

• Dropout Voltage of 130 mV (Typical) at 1.5A

transistor, while V

is the input voltage which

Load Current

supplies power to the load. The use of an external

• Precision Output Voltage across All Line and

bias rail allows the part to operate from ultra low V

Load Conditions:

voltages. Unlike bipolar regulators, the CMOS

architecture consumes extremely low quiescent

– ±1.0% V

OUT

for T

= 25°C

current at any output load current. The use of an N-

– ±2.0% V

OUT

for 0°C ≤ T

≤ +125°C

MOS power transistor results in wide bandwidth, yet

– ±3.0% V

OUT

for -40°C ≤ T

≤ +125°C

minimum external capacitance is required to maintain

• Over-Temperature and Over-Current loop stability.

Protection

The fast transient response of this device makes it

• Available in 5 Lead TO-220 and DDPAK/TO-263

suitable for use in powering DSP, Microcontroller

Packages

Core voltages and Switch Mode Power Supply post

regulators. The LP38858 is available in TO-220 and

• Custom V

OUT

Values between 0.8V and 1.2V

DDPAK/TO-263 5-Lead packages.

are Available

Dropout Voltage: 130mV (typical) at 1.5A load

• −40°C to +125°C Operating Temperature Range

current.

APPLICATIONS

Low Ground Pin Current: 10 mA (typical) at 1.5A

load current.

• ASIC Power Supplies In:

– Desktops, Notebooks, and Graphics Cards,

Soft-Start: Programmable Soft-Start time.

Servers

Precision Output Voltage: ±1.0% for T

= 25°C and

– Gaming Set Top Boxes, Printers and

±2.0% for 0°C ≤ T

≤ +125°C, across all line and load

Copiers

conditions

• Server Core and I/O Supplies

• DSP and FPGA Power Supplies

• SMPS Post-Regulator

Typical Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (21 pages)

PAGE 1
LP38858 www.ti.com SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 1.5A Fast-Response High-Accuracy LDO Linear Regulator with Soft-Start Check for Samples: LP38858 FEATURES DESCRIPTION • • The LP38858 is a high current, fast response regulator which can maintain output voltage regulation with extremely low input to output voltage drop.
PAGE 2
LP38858 SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com Connection Diagram TAB IS GND SS 1 OUT 4 SS 1 LP38858T-x.x GND 3 LP38858S-x.x IN 2 IN 2 GND 3 OUT 4 BIAS 5 TAB IS GND BIAS 5 Figure 1. DDPAK/TO-263–5 Package (Top View) See Package Number KTT0005B Figure 2. TO220–5 Package (Top View) See Package Number NDH0005D Pin Descriptions TO-220–5 and DDPAK/TO-263–5 Packages Pin # Pin Symbol 1 SS Soft-Start capacitor connection. Used to slow the rise time of VOUT at turn-on.
PAGE 3
LP38858 www.ti.com SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 Operating Ratings (1) VIN Supply Voltage (VOUT + VDO) to VBIAS VBIAS Supply Voltage 3.0V to 5.5V IOUT 0 mA to 1.5A Junction Temperature Range (2) (1) −40°C to +125°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but does not ensure specific performance limits.
PAGE 4
LP38858 SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) Unless otherwise specified: VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT = 10 mA, CIN = COUT = 10 µF, CBIAS = 1 µF, CSS = open. Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation.
PAGE 5
LP38858 www.ti.com SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 Typical Performance Characteristics Unless otherwise specified: TJ = 25°C, VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT = 10 mA, CIN = COUT = 10 µF Ceramic, CBIAS = 1 µF Ceramic, CSS = open. VBIAS Ground Pin Current (IGND(BIAS)) vs VBIAS VBIAS Ground Pin Current (IGND(BIAS)) vs Temperature Figure 3. Figure 4. VIN Ground Pin Current vs Temperature Load Regulation vs Temperature Figure 5. Figure 6.
PAGE 6
LP38858 SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT = 10 mA, CIN = COUT = 10 µF Ceramic, CBIAS = 1 µF Ceramic, CSS = open. 6 VOUT vs Temperature UVLO Thresholds vs Temperature Figure 9. Figure 10. Soft-Start Resistor (rSS) vs Temperature Soft-Start rSS Variation vs Temperature Figure 11. Figure 12.
PAGE 7
LP38858 www.ti.com SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT = 10 mA, CIN = COUT = 10 µF Ceramic, CBIAS = 1 µF Ceramic, CSS = open. VIN Line Transient Response VBIAS Line Transient Response Figure 15. Figure 16. VBIAS Line Transient Response Load Transient Response, COUT = 10 µF Ceramic Figure 17. Figure 18.
PAGE 8
LP38858 SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT = 10 mA, CIN = COUT = 10 µF Ceramic, CBIAS = 1 µF Ceramic, CSS = open. 8 Load Transient Response, COUT = 100 µF Ceramic Load Transient Response, COUT = 100 µF Tantalum Figure 21. Figure 22. Load Transient Response, COUT = 100 µF Tantalum VBIAS PSRR Figure 23. Figure 24. VIN PSRR Output Noise Figure 25.
PAGE 9
LP38858 www.ti.com SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 Block Diagram OUT IN LP38858-x.x BIAS Under-Voltage Lock-Out Thermal Shut Down rSS VREF SS ILIMIT GND 0.6V APPLICATION INFORMATION EXTERNAL CAPACITORS To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit. Output Capacitor A minimum output capacitance of 10 µF, ceramic, is required for stability. The amount of output capacitance can be increased without limit.
PAGE 10
LP38858 SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com INPUT VOLTAGE The input voltage (VIN) is the high current external voltage rail that will be regulated down to a lower voltage, which is applied to the load. The input voltage must be at least VOUT + VDO, and no higher than whatever values is used for VBIAS. BIAS VOLTAGE The bias voltage (VBIAS) is a low current external voltage rail required to bias the control circuitry and provide gate drive for the N-FET pass transistor.
PAGE 11
LP38858 www.ti.com SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 Soft-Start Time = CSS × rSS × 5 (1) Since the VOUT rise will be exponential, not linear, the in-rush current will peak during the first time constant (τ), and VOUT will require four additional time constants (4τ) to reach the final value (5τ) . After achieving normal operation, should VBIAS fall below the ULVO threshold the device output will be disabled and the Soft-Start capacitor (CSS) discharge circuit will become active.
PAGE 12
LP38858 SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.
PAGE 13
LP38858 www.ti.com SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 Figure 28. θJA vs Copper (1 Ounce) Area for the DDPAK/TO-263 package Figure 28 shows that increasing the copper area beyond 1 square inch produces very little improvement. The minimum value for θJA for the DDPAK/TO-263 package mounted to a PCB is 32°C/W. Figure 29 shows the maximum allowable power dissipation for DDPAK/TO-263 packages for different ambient temperatures, assuming θJA is 35°C/W and the maximum junction temperature is 125°C.
PAGE 14
LP38858 SNVS462D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision C (April 2013) to Revision D • 14 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP38858S-0.8/NOPB ACTIVE DDPAK/ TO-263 KTT 5 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP38858S -0.8 LP38858S-1.2 NRND DDPAK/ TO-263 KTT 5 45 TBD Call TI Call TI -40 to 125 LP38858S -1.2 LP38858S-1.
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LP38858SX-0.8/NOPB DDPAK/ TO-263 KTT 5 500 330.0 24.4 LP38858SX-1.2/NOPB DDPAK/ TO-263 KTT 5 500 330.0 24.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.75 14.85 5.0 16.0 24.0 Q2 10.75 14.85 5.0 16.0 24.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP38858SX-0.8/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP38858SX-1.2/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.
PAGE 19
MECHANICAL DATA NDH0005D www.ti.
PAGE 20
MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.
PAGE 21
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.