Datasheet

LP38851
www.ti.com SNVS492C –JUNE 2007–REVISED APRIL 2013
SOFT-START
The LP38851 incorporates a Soft-Start function that reduces the start-up current surge into the output capacitor
(C
OUT
) by allowing V
OUT
to rise slowly to the final value. This is accomplished by controlling V
REF
at the SS pin.
The soft-start timing capacitor (C
SS
) is internally held to ground until both V
BIAS
rises above the Under-Voltage
Lock-Out threshold (ULVO) and the Enable pin is higher than the V
EN(ON)
threshold.
V
REF
will rise at an RC rate defined by the internal resistance of the SS pin (r
SS
), and the external capacitor
connected to the SS pin. This allows the output voltage to rise in a controlled manner until steady-state
regulation is achieved. Typically, five time constants are recommended to assure that the output voltage is
sufficiently close to the final steady-state value. During the soft-start time the output current can rise to the built-in
current limit.
Soft-Start Time = C
SS
× r
SS
× 5 (7)
Since the V
OUT
rise will be exponential, not linear, the in-rush current will peak during the first time constant (τ),
and V
OUT
will require four additional time constants (4τ) to reach the final value (5τ) .
After achieving normal operation, should either V
BIAS
fall below the ULVO threshold, or the Enable pin fall below
the V
EN(OFF)
threshold, the device output will be disabled and the Soft-Start capacitor (C
SS
) discharge circuit will
become active. The C
SS
discharge circuit will remain active until V
BIAS
falls to 500 mV (typical). When V
BIAS
falls
below 500 mV (typical), the C
SS
discharge circuit will cease to function due to a lack of sufficient biasing to the
control circuitry.
Since V
REF
appears on the SS pin, any leakage through C
SS
will cause V
REF
to fall, and thus affect V
OUT
. A
leakage of 50 nA (about 10 MΩ) through C
SS
will cause V
OUT
to be approximately 0.1% lower than nominal, while
a leakage of 500 nA (about 1 MΩ) will cause V
OUT
to be approximately 1% lower than nominal. Typical ceramic
capacitors will have a factor of 10X difference in leakage between 25°C and 85°C, so the maximum ambient
temperature must be included in the capacitor selection process.
Typical C
SS
values will be in the range of 1 nF to 100 nF, providing typical Soft-Start times in the range of 70 μs
to 7 ms (5τ). Values less than 1 nF can be used, but the Soft-Start effect will be minimal. Values larger than 100
nF will provide soft-start, but may not be fully discharged if V
BIAS
falls from the UVLVO threshold to less than 500
mV in less than 100 µs.
Figure 31 shows the relationship between the C
OUT
value and a typical C
SS
value.
Figure 31. Typical C
SS
vs C
OUT
Values
The C
SS
capacitor must be connected to a clean ground path back to the device ground pin. No components,
other than C
SS
, should be connected to the SS pin, as there could be adverse effects to V
OUT
.
If the Soft-Start function is not needed the SS pin should be left open, although some minimal capacitance value
is always recommended.
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LP38851