Datasheet

LP3878-ADJ
www.ti.com SNVS311B –MAY 2005–REVISED APRIL 2013
PIN DESCRIPTIONS
Pin Name Function
1 BYPASS The capacitor connected between BYPASS and GROUND lowers output noise
voltage level and is required for loop stability.
2 N/C DO NOT CONNECT. This pin is used for post package test and must be left
floating.
3 GROUND Device ground.
4 INPUT Input source voltage.
5 OUTPUT Regulated output voltage.
6 ADJ Provides feedback to error amplifier from the resistive divider that sets the
output voltage.
7 N/C No internal connection.
8 SHUTDOWN Output is enabled above turn-on threshold voltage. Pull down to turn off
regulator output.
SO PowerPAD, SUBSTRATE The exposed die attach pad should be connected to a thermal pad at ground
WSON GROUND potential. For additional information on using TI's Non Pull Back WSON
DAP package, please refer to WSON application note AN-1187
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
Storage Temperature Range −65°C to +150°C
Operating Junction Temperature Range -40°C to +125°C
Lead Temperature (Soldering, 5 seconds) 260°C
ESD Rating
(3)
2 kV
Shutdown Pin 1kV
Power Dissipation
(4)
Internally Limited
Input Supply Voltage (Survival) −0.3V to +16V
Input Supply Voltage (Typical Operating) 2.5V to +16V
ADJ Pin −0.3V to +6V
Output Voltage (Survival)
(5)
−0.3V to +6V
I
OUT
(Survival) Short Circuit Protected
Input-Output Voltage (Survival)
(6)
−0.3V to +16V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply
when operating the device outside of its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) ESD testing was performed using Human Body Model, a 100 pF capacitor discharged through a 1.5 kΩ resistor.
(4) The maximum allowable power dissipation is a function of the maximum junction temperature, T
J
(MAX), the junction-to-ambient thermal
resistance, θ
J−A
, and the ambient temperature, T
A
. The maximum allowable power dissipation at any ambient temperature is calculated
using:
The value of θ
J−A
for the WSON (NGT) and SO PowerPAD (DDA) packages are specifically dependent on PCB trace area, trace
material, and the number of layers and thermal vias. If a four layer board is used with maximum vias from the IC center to the heat
dissipating copper layers, values of θ
J−A
which can be obtained are approximately 60°C/W for the SO PowerPAD-8 and 40°C/W for the
WSON-8 package. For improved thermal resistance and power dissipation for the WSON package, refer to Application Note AN-1187.
Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal
shutdown.
(5) If used in a dual-supply system where the regulator load is returned to a negative supply, the LP3878-ADJ output must be diode-
clamped to ground.
(6) The output PNP structure contains a diode between the V
IN
and V
OUT
terminals that is normally reverse-biased. Forcing the output
above the input will turn on this diode and may induce a latch-up mode which can damage the part (see Application Hints).
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