Datasheet

+
-
2
7
8
5416
3
1.0V
V
REF
Error
Amp
LP3878-ADJ
BYPASS
N/C
GROUND
INPUT
ADJ
OUTPUT
N/C
SHUTDOWN
+
LP3878-ADJ
SNVS311B MAY 2005REVISED APRIL 2013
www.ti.com
Block Diagram
APPLICATION INFORMATION
PACKAGE INFORMATION
The LP3878-ADJ is offered in the 8 lead SO PowerPAD or WSON surface mount packages to allow for
increased power dissipation compared to the SO-8 and Mini SO-8. For details on thermal performance as well as
mounting and soldering specifications, refer to Application Note AN-1187.
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP3878-ADJ requires external capacitors for regulator stability. These
capacitors must be correctly selected for good performance.
INPUT CAPACITOR:
A capacitor whose value is at least 4.7 µF (±20%) is required between the LP3878-ADJ input and ground. A
good quality X5R / X7R ceramic capacitor should be used.
Capacitor tolerance and temperature variation must be considered when selecting a capacitor (see CAPACITOR
CHARACTERISTICS section) to assure the minimum requirement of input capacitance is met over all operating
conditions.
The input capacitor must be located not more than 0.5" from the input pin and returned to a clean analog ground.
Any good quality ceramic or tantalum capacitor may be used, assuming the minimum input capacitance
requirement is met.
OUTPUT CAPACITOR:
The LP3878-ADJ requires a ceramic output capacitor whose size is at least 10 µF 20%). A good quality X5R /
X7R ceramic capacitor should be used. Capacitance tolerance and temperature characteristics must be
considered when selecting an output capacitor.
The LP3878-ADJ is designed specifically to work with ceramic output capacitors, utilizing circuitry which allows
the regulator to be stable across the entire range of output current with an ultra low ESR output capacitor.
The output capacitor selected must meet the requirement for minimum amount of capacitance and also have an
ESR (equivalent series resistance) value which is within the stable range. A curve is provided which shows the
stable ESR range as a function of load current (see Figure 31).
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