Datasheet

LP38690, LP38692
www.ti.com SNVS322J –DECEMBER 2004–REVISED APRIL 2013
TANTALUM
Solid Tantalum capacitors have good temperature stability: a high quality Tantalum will typically show a
capacitance value that varies less than 10-15% across the full temperature range of -40°C to +125°C. ESR will
vary only about 2X going from the high to low temperature limits.
REVERSE VOLTAGE
A reverse voltage condition will exist when the voltage at the output pin is higher than the voltage at the input pin.
Typically this will happen when V
IN
is abruptly taken low and C
OUT
continues to hold a sufficient charge such that
the input to output voltage becomes reversed. A less common condition is when an alternate voltage source is
connected to the output.
There are two possible paths for current to flow from the output pin back to the input during a reverse voltage
condition.
1) While V
IN
is high enough to keep the control circuity alive, and the Enable pin (LP38692 only) is above the
V
EN(ON)
threshold, the control circuitry will attempt to regulate the output voltage. If the input voltage is less than
the programmed output voltage, the control circuit will drive the gate of the pass element to the full ON condition.
In this condition, reverse current will flow from the output pin to the input pin, limited only by the R
DS(ON)
of the
pass element and the output to input voltage differential. Discharging an output capacitor up to 1000 μF in this
manner will not damage the device as the current will rapidly decay. However, continuous reverse current should
be avoided. When the Enable pin is low this condition will be prevented.
2) The internal PFET pass element has an inherent parasitic diode. During normal operation, the input voltage is
higher than the output voltage and the parasitic diode is reverse biased. However, when V
IN
is below the value
where the control circuity is alive, or the Enable pin is low (LP38692 only), and the output voltage is more than
500 mV (typical) above the input voltage the parasitic diode becomes forward biased and current flows from the
output pin to the input pin through the diode. The current in the parasitic diode should be limited to less than 1A
continuous and 5A peak.
If used in a dual-supply system where the regulator output load is returned to a negative supply, the output pin
must be diode clamped to ground to limit the negative voltage transition. A Schottky diode is recommended for
this protective clamp.
PCB LAYOUT
Good PC layout practices must be used or instability can be induced because of ground loops and voltage drops.
The input and output capacitors must be directly connected to the input, output, and ground pins of the regulator
using traces which do not have other currents flowing in them (Kelvin connect).
The best way to do this is to lay out C
IN
and C
OUT
near the device with short traces to the V
IN
, V
OUT
, and ground
pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its
capacitors have a "single point ground".
It should be noted that stability problems have been seen in applications where "vias" to an internal ground plane
were used at the ground points of the IC and the input and output capacitors. This was caused by varying ground
potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground
technique for the regulator and it’s capacitors fixed the problem. Since high current flows through the traces
going into V
IN
and coming from V
OUT
, Kelvin connect the capacitor leads to these pins so there is no voltage drop
in series with the input and output capacitors.
WSON MOUNTING
The NGG0006A (No Pullback) 6-Lead WSON package requires specific mounting techniques which are detailed
in the TI AN-1187 Application Report. Referring to the section PCB Design Recommendations (Page 5), it
should be noted that the pad style which should be used with the WSON package is the NSMD (non-solder mask
defined) type. Additionally, it is recommended the PCB terminal pads to be 0.2 mm longer than the package
pads to create a solder fillet to improve reliability and inspection.
The input current is split between two V
IN
pins, 1 and 6. The two V
IN
pins must be connected together to ensure
that the device can meet all specifications at the rated current.
The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the
amount of additional copper area connected to the DAP.
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